[PATCH] D25679: Do not assume that FP vector operands are never legalized by expanding

[Ehsan Amiri via llvm-commits]

amehsan added inline comments.


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Comment at: lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp:337-340
 SDValue DAGTypeLegalizer::ExpandOp_BITCAST(SDNode *N) {
   SDLoc dl(N);
-  if (N->getValueType(0).isVector()) {
+  if (N->getValueType(0).isVector() &&
+      N->getOperand(0).getValueType().isInteger()) {
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So, for cases that your new condition is not satisfied, what change do we make in the generated code? (The question applies to other platforms as well). I believe there is no testcase in unit-tests for this, (otherwise it would have failed and would have been included in your changes). Still this may happen in benchmarks and real work loads. I think you may need to investigate how that code pattern changes and what is the potential performance impact of your change for that code pattern. 


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Comment at: test/CodeGen/PowerPC/pr30715.ll:8
+
+define weak_odr void @_ZNK10FullMatrixIgE5m_fn2IfEEvR6VectorIT_ERKS4_b(%class.FullMatrix* %this, %class.Vector* dereferenceable(8) %p1, %class.Vector* dereferenceable(8), i1 zeroext) {
+entry:
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Please remove mangled name from the test file.


Repository:
  rL LLVM

https://reviews.llvm.org/D25679