[PATCH] D25670: [ARM] Assign cost of scaling for Cortex-R52

[Javed Absar via llvm-commits]

javed.absar updated this revision to Diff 74850.
javed.absar added a comment.

Hi James:
Have revised the test based on your suggestions. Please have a look if it is alright for you now.
Best Regards
Javed


https://reviews.llvm.org/D25670

Files:
  lib/Target/ARM/ARM.td
  test/CodeGen/ARM/lsr-scale-addr-mode.ll


Index: test/CodeGen/ARM/lsr-scale-addr-mode.ll
===================================================================
--- test/CodeGen/ARM/lsr-scale-addr-mode.ll
+++ test/CodeGen/ARM/lsr-scale-addr-mode.ll
@@ -1,8 +1,9 @@
 ; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s
 ; Should use scaled addressing mode.
 
-; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a53 %s -o - | FileCheck %s -check-prefix CHECK-NONEGOFF-A53
-; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a57 %s -o - | FileCheck %s -check-prefix CHECK-NONEGOFF-A57
+; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a53 %s -o - | FileCheck %s -check-prefix CHECK-NONEGOFF
+; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a57 %s -o - | FileCheck %s -check-prefix CHECK-NONEGOFF
+; RUN: llc -mtriple=arm-eabi -mcpu=cortex-r52 %s -o - | FileCheck %s -check-prefix CHECK-NONEGOFF
 ; Should not generate negated register offset
 
 define void @sintzero(i32* %a) nounwind {
@@ -23,6 +24,5 @@
 }
 
 ; CHECK: lsl{{.*}}#2]
-; CHECK-NONEGOFF-A53: [{{r[0-9]+}}, {{r[0-9]+}}, lsl{{.*}}#2]
-; CHECK-NONEGOFF-A57: [{{r[0-9]+}}, {{r[0-9]+}}, lsl{{.*}}#2]
+; CHECK-NONEGOFF: [{{r[0-9]+}}, {{r[0-9]+}}, lsl{{.*}}#2]
 
Index: lib/Target/ARM/ARM.td
===================================================================
--- lib/Target/ARM/ARM.td
+++ lib/Target/ARM/ARM.td
@@ -823,7 +823,8 @@
                                                          FeatureCrypto,
                                                          FeatureCRC]>;
 
-def : ProcNoItin<"cortex-r52",                          [ARMv8r, ProcR52]>;
+def : ProcNoItin<"cortex-r52",                          [ARMv8r, ProcR52,
+                                                         FeatureFPAO]>;
 
 //===----------------------------------------------------------------------===//
 // Register File Description


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