[llvm] r284287 - GlobalISel: rename legalizer components to match others.
Tim Northover via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 14 15:18:18 PDT 2016
Author: tnorthover
Date: Fri Oct 14 17:18:18 2016
New Revision: 284287
URL: http://llvm.org/viewvc/llvm-project?rev=284287&view=rev
Log:
GlobalISel: rename legalizer components to match others.
The previous names were both misleading (the MachineLegalizer actually
contained the info tables) and inconsistent with the selector & translator (in
having a "Machine") prefix. This should make everything sensible again.
The only functional change is the name of a couple of command-line options.
Added:
llvm/trunk/include/llvm/CodeGen/GlobalISel/Legalizer.h
- copied, changed from r284281, llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizePass.h
llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
- copied, changed from r284281, llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h
llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
- copied, changed from r284281, llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizer.h
llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp
- copied, changed from r284281, llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizePass.cpp
llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
- copied, changed from r284281, llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp
llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
- copied, changed from r284281, llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizer.cpp
llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp
- copied, changed from r284281, llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp
llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.h
- copied, changed from r284281, llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.h
llvm/trunk/unittests/CodeGen/GlobalISel/LegalizerInfoTest.cpp
Removed:
llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h
llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizePass.h
llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizer.h
llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp
llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizePass.cpp
llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizer.cpp
llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp
llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.h
llvm/trunk/unittests/CodeGen/GlobalISel/MachineLegalizerTest.cpp
Modified:
llvm/trunk/include/llvm/CodeGen/GlobalISel/GISelAccessor.h
llvm/trunk/include/llvm/InitializePasses.h
llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h
llvm/trunk/lib/CodeGen/GlobalISel/CMakeLists.txt
llvm/trunk/lib/CodeGen/GlobalISel/GlobalISel.cpp
llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp
llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp
llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp
llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
llvm/trunk/lib/Target/AArch64/CMakeLists.txt
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-gep.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ignore-non-generic.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-property.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
llvm/trunk/test/CodeGen/AArch64/arm64-AnInfiniteLoopInDAGCombine.ll
llvm/trunk/test/CodeGen/AArch64/arm64-fp-contract-zero.ll
llvm/trunk/test/CodeGen/AArch64/arm64-subsections.ll
llvm/trunk/test/CodeGen/AArch64/branch-relax-alignment.ll
llvm/trunk/test/CodeGen/AArch64/simple-macho.ll
llvm/trunk/unittests/CodeGen/GlobalISel/CMakeLists.txt
Modified: llvm/trunk/include/llvm/CodeGen/GlobalISel/GISelAccessor.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/GISelAccessor.h?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/GISelAccessor.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/GISelAccessor.h Fri Oct 14 17:18:18 2016
@@ -18,7 +18,7 @@
namespace llvm {
class CallLowering;
class InstructionSelector;
-class MachineLegalizer;
+class LegalizerInfo;
class RegisterBankInfo;
/// The goal of this helper class is to gather the accessor to all
@@ -32,9 +32,7 @@ struct GISelAccessor {
virtual const InstructionSelector *getInstructionSelector() const {
return nullptr;
}
- virtual const MachineLegalizer *getMachineLegalizer() const {
- return nullptr;
- }
+ virtual const LegalizerInfo *getLegalizerInfo() const { return nullptr; }
virtual const RegisterBankInfo *getRegBankInfo() const { return nullptr;}
};
} // End namespace llvm;
Copied: llvm/trunk/include/llvm/CodeGen/GlobalISel/Legalizer.h (from r284281, llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizePass.h)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/Legalizer.h?p2=llvm/trunk/include/llvm/CodeGen/GlobalISel/Legalizer.h&p1=llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizePass.h&r1=284281&r2=284287&rev=284287&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizePass.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/Legalizer.h Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-//== llvm/CodeGen/GlobalISel/MachineLegalizePass.h ------------- -*- C++ -*-==//
+//== llvm/CodeGen/GlobalISel/LegalizePass.h ------------- -*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
@@ -28,7 +28,7 @@ namespace llvm {
class MachineRegisterInfo;
-class MachineLegalizePass : public MachineFunctionPass {
+class Legalizer : public MachineFunctionPass {
public:
static char ID;
@@ -39,9 +39,9 @@ private:
public:
// Ctor, nothing fancy.
- MachineLegalizePass();
+ Legalizer();
- StringRef getPassName() const override { return "MachineLegalizePass"; }
+ StringRef getPassName() const override { return "Legalizer"; }
void getAnalysisUsage(AnalysisUsage &AU) const override;
Copied: llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h (from r284281, llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h?p2=llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h&p1=llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h&r1=284281&r2=284287&rev=284287&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-//== llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h ----------- -*- C++ -*-==//
+//== llvm/CodeGen/GlobalISel/LegalizerHelper.h ---------------- -*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
@@ -12,7 +12,7 @@
/// occur in multiple phases, for example G_ADD <2 x i8> -> G_ADD <2 x i16> ->
/// G_ADD <4 x i16>.
///
-/// The MachineLegalizeHelper class is where most of the work happens, and is
+/// The LegalizerHelper class is where most of the work happens, and is
/// designed to be callable from other passes that find themselves with an
/// illegal instruction.
//
@@ -27,11 +27,11 @@
namespace llvm {
// Forward declarations.
-class MachineLegalizeInfo;
-class MachineLegalizer;
+class LegalizerInfo;
+class Legalizer;
class MachineRegisterInfo;
-class MachineLegalizeHelper {
+class LegalizerHelper {
public:
enum LegalizeResult {
/// Instruction was already legal and no change was made to the
@@ -46,7 +46,7 @@ public:
UnableToLegalize,
};
- MachineLegalizeHelper(MachineFunction &MF);
+ LegalizerHelper(MachineFunction &MF);
/// Replace \p MI by a sequence of legal instructions that can implement the
/// same operation. Note that this means \p MI may be deleted, so any iterator
@@ -56,10 +56,10 @@ public:
/// Considered as an opaque blob, the legal code will use and define the same
/// registers as \p MI.
LegalizeResult legalizeInstrStep(MachineInstr &MI,
- const MachineLegalizer &Legalizer);
+ const LegalizerInfo &LegalizerInfo);
LegalizeResult legalizeInstr(MachineInstr &MI,
- const MachineLegalizer &Legalizer);
+ const LegalizerInfo &LegalizerInfo);
/// Legalize an instruction by emiting a runtime library call instead.
LegalizeResult libcall(MachineInstr &MI);
Copied: llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h (from r284281, llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizer.h)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h?p2=llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h&p1=llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizer.h&r1=284281&r2=284287&rev=284287&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizer.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-//==-- llvm/CodeGen/GlobalISel/MachineLegalizer.h ----------------*- C++ -*-==//
+//==-- llvm/CodeGen/GlobalISel/LegalizerInfo.h -------------------*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
@@ -46,7 +46,7 @@ struct InstrAspect {
}
};
-class MachineLegalizer {
+class LegalizerInfo {
public:
enum LegalizeAction : std::uint8_t {
/// The operation is expected to be selectable directly by the target, and
@@ -95,7 +95,7 @@ public:
NotFound,
};
- MachineLegalizer();
+ LegalizerInfo();
/// Compute any ancillary tables needed to quickly decide how an operation
/// should be handled. This must be called after all "set*Action"methods but
Removed: llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h?rev=284286&view=auto
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h (removed)
@@ -1,104 +0,0 @@
-//== llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h ----------- -*- C++ -*-==//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file A pass to convert the target-illegal operations created by IR -> MIR
-/// translation into ones the target expects to be able to select. This may
-/// occur in multiple phases, for example G_ADD <2 x i8> -> G_ADD <2 x i16> ->
-/// G_ADD <4 x i16>.
-///
-/// The MachineLegalizeHelper class is where most of the work happens, and is
-/// designed to be callable from other passes that find themselves with an
-/// illegal instruction.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CODEGEN_GLOBALISEL_MACHINELEGALIZEHELPER_H
-#define LLVM_CODEGEN_GLOBALISEL_MACHINELEGALIZEHELPER_H
-
-#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/LowLevelType.h"
-
-namespace llvm {
-// Forward declarations.
-class MachineLegalizeInfo;
-class MachineLegalizer;
-class MachineRegisterInfo;
-
-class MachineLegalizeHelper {
-public:
- enum LegalizeResult {
- /// Instruction was already legal and no change was made to the
- /// MachineFunction.
- AlreadyLegal,
-
- /// Instruction has been legalized and the MachineFunction changed.
- Legalized,
-
- /// Some kind of error has occurred and we could not legalize this
- /// instruction.
- UnableToLegalize,
- };
-
- MachineLegalizeHelper(MachineFunction &MF);
-
- /// Replace \p MI by a sequence of legal instructions that can implement the
- /// same operation. Note that this means \p MI may be deleted, so any iterator
- /// steps should be performed before calling this function. \p Helper should
- /// be initialized to the MachineFunction containing \p MI.
- ///
- /// Considered as an opaque blob, the legal code will use and define the same
- /// registers as \p MI.
- LegalizeResult legalizeInstrStep(MachineInstr &MI,
- const MachineLegalizer &Legalizer);
-
- LegalizeResult legalizeInstr(MachineInstr &MI,
- const MachineLegalizer &Legalizer);
-
- /// Legalize an instruction by emiting a runtime library call instead.
- LegalizeResult libcall(MachineInstr &MI);
-
- /// Legalize an instruction by reducing the width of the underlying scalar
- /// type.
- LegalizeResult narrowScalar(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);
-
- /// Legalize an instruction by performing the operation on a wider scalar type
- /// (for example a 16-bit addition can be safely performed at 32-bits
- /// precision, ignoring the unused bits).
- LegalizeResult widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
-
- /// Legalize an instruction by splitting it into simpler parts, hopefully
- /// understood by the target.
- LegalizeResult lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
-
- /// Legalize a vector instruction by splitting into multiple components, each
- /// acting on the same scalar type as the original but with fewer elements.
- LegalizeResult fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
- LLT NarrowTy);
-
- /// Legalize a vector instruction by increasing the number of vector elements
- /// involved and ignoring the added elements later.
- LegalizeResult moreElementsVector(MachineInstr &MI, unsigned TypeIdx,
- LLT WideTy);
-
-private:
-
- /// Helper function to split a wide generic register into bitwise blocks with
- /// the given Type (which implies the number of blocks needed). The generic
- /// registers created are appended to Ops, starting at bit 0 of Reg.
- void extractParts(unsigned Reg, LLT Ty, int NumParts,
- SmallVectorImpl<unsigned> &Ops);
-
- MachineIRBuilder MIRBuilder;
- MachineRegisterInfo &MRI;
-};
-
-} // End namespace llvm.
-
-#endif
Removed: llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizePass.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizePass.h?rev=284286&view=auto
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizePass.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizePass.h (removed)
@@ -1,65 +0,0 @@
-//== llvm/CodeGen/GlobalISel/MachineLegalizePass.h ------------- -*- C++ -*-==//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file A pass to convert the target-illegal operations created by IR -> MIR
-/// translation into ones the target expects to be able to select. This may
-/// occur in multiple phases, for example G_ADD <2 x i8> -> G_ADD <2 x i16> ->
-/// G_ADD <4 x i16>.
-///
-/// The LegalizeHelper class is where most of the work happens, and is designed
-/// to be callable from other passes that find themselves with an illegal
-/// instruction.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CODEGEN_GLOBALISEL_LEGALIZEMACHINEIRPASS_H
-#define LLVM_CODEGEN_GLOBALISEL_LEGALIZEMACHINEIRPASS_H
-
-#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
-#include "llvm/CodeGen/MachineFunctionPass.h"
-
-namespace llvm {
-
-class MachineRegisterInfo;
-
-class MachineLegalizePass : public MachineFunctionPass {
-public:
- static char ID;
-
-private:
-
- /// Initialize the field members using \p MF.
- void init(MachineFunction &MF);
-
-public:
- // Ctor, nothing fancy.
- MachineLegalizePass();
-
- StringRef getPassName() const override { return "MachineLegalizePass"; }
-
- void getAnalysisUsage(AnalysisUsage &AU) const override;
-
- MachineFunctionProperties getRequiredProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::IsSSA);
- }
-
- MachineFunctionProperties getSetProperties() const override {
- return MachineFunctionProperties().set(
- MachineFunctionProperties::Property::Legalized);
- }
-
- bool combineExtracts(MachineInstr &MI, MachineRegisterInfo &MRI,
- const TargetInstrInfo &TII);
-
- bool runOnMachineFunction(MachineFunction &MF) override;
-};
-} // End namespace llvm.
-
-#endif
Removed: llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizer.h?rev=284286&view=auto
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizer.h (original)
+++ llvm/trunk/include/llvm/CodeGen/GlobalISel/MachineLegalizer.h (removed)
@@ -1,207 +0,0 @@
-//==-- llvm/CodeGen/GlobalISel/MachineLegalizer.h ----------------*- C++ -*-==//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// Interface for Targets to specify which operations they can successfully
-/// select and how the others should be expanded most efficiently.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CODEGEN_GLOBALISEL_MACHINELEGALIZER_H
-#define LLVM_CODEGEN_GLOBALISEL_MACHINELEGALIZER_H
-
-#include "llvm/ADT/DenseMap.h"
-#include "llvm/CodeGen/LowLevelType.h"
-#include "llvm/Target/TargetOpcodes.h"
-
-#include <cstdint>
-#include <functional>
-
-namespace llvm {
-class LLVMContext;
-class MachineInstr;
-class MachineRegisterInfo;
-class Type;
-class VectorType;
-
-/// Legalization is decided based on an instruction's opcode, which type slot
-/// we're considering, and what the existing type is. These aspects are gathered
-/// together for convenience in the InstrAspect class.
-struct InstrAspect {
- unsigned Opcode;
- unsigned Idx;
- LLT Type;
-
- InstrAspect(unsigned Opcode, LLT Type) : Opcode(Opcode), Idx(0), Type(Type) {}
- InstrAspect(unsigned Opcode, unsigned Idx, LLT Type)
- : Opcode(Opcode), Idx(Idx), Type(Type) {}
-
- bool operator==(const InstrAspect &RHS) const {
- return Opcode == RHS.Opcode && Idx == RHS.Idx && Type == RHS.Type;
- }
-};
-
-class MachineLegalizer {
-public:
- enum LegalizeAction : std::uint8_t {
- /// The operation is expected to be selectable directly by the target, and
- /// no transformation is necessary.
- Legal,
-
- /// The operation should be synthesized from multiple instructions acting on
- /// a narrower scalar base-type. For example a 64-bit add might be
- /// implemented in terms of 32-bit add-with-carry.
- NarrowScalar,
-
- /// The operation should be implemented in terms of a wider scalar
- /// base-type. For example a <2 x s8> add could be implemented as a <2
- /// x s32> add (ignoring the high bits).
- WidenScalar,
-
- /// The (vector) operation should be implemented by splitting it into
- /// sub-vectors where the operation is legal. For example a <8 x s64> add
- /// might be implemented as 4 separate <2 x s64> adds.
- FewerElements,
-
- /// The (vector) operation should be implemented by widening the input
- /// vector and ignoring the lanes added by doing so. For example <2 x i8> is
- /// rarely legal, but you might perform an <8 x i8> and then only look at
- /// the first two results.
- MoreElements,
-
- /// The operation itself must be expressed in terms of simpler actions on
- /// this target. E.g. a SREM replaced by an SDIV and subtraction.
- Lower,
-
- /// The operation should be implemented as a call to some kind of runtime
- /// support library. For example this usually happens on machines that don't
- /// support floating-point operations natively.
- Libcall,
-
- /// The target wants to do something special with this combination of
- /// operand and type. A callback will be issued when it is needed.
- Custom,
-
- /// This operation is completely unsupported on the target. A programming
- /// error has occurred.
- Unsupported,
-
- /// Sentinel value for when no action was found in the specified table.
- NotFound,
- };
-
- MachineLegalizer();
-
- /// Compute any ancillary tables needed to quickly decide how an operation
- /// should be handled. This must be called after all "set*Action"methods but
- /// before any query is made or incorrect results may be returned.
- void computeTables();
-
- /// More friendly way to set an action for common types that have an LLT
- /// representation.
- void setAction(const InstrAspect &Aspect, LegalizeAction Action) {
- TablesInitialized = false;
- unsigned Opcode = Aspect.Opcode - FirstOp;
- if (Actions[Opcode].size() <= Aspect.Idx)
- Actions[Opcode].resize(Aspect.Idx + 1);
- Actions[Aspect.Opcode - FirstOp][Aspect.Idx][Aspect.Type] = Action;
- }
-
- /// If an operation on a given vector type (say <M x iN>) isn't explicitly
- /// specified, we proceed in 2 stages. First we legalize the underlying scalar
- /// (so that there's at least one legal vector with that scalar), then we
- /// adjust the number of elements in the vector so that it is legal. The
- /// desired action in the first step is controlled by this function.
- void setScalarInVectorAction(unsigned Opcode, LLT ScalarTy,
- LegalizeAction Action) {
- assert(!ScalarTy.isVector());
- ScalarInVectorActions[std::make_pair(Opcode, ScalarTy)] = Action;
- }
-
-
- /// Determine what action should be taken to legalize the given generic
- /// instruction opcode, type-index and type. Requires computeTables to have
- /// been called.
- ///
- /// \returns a pair consisting of the kind of legalization that should be
- /// performed and the destination type.
- std::pair<LegalizeAction, LLT> getAction(const InstrAspect &Aspect) const;
-
- /// Determine what action should be taken to legalize the given generic
- /// instruction.
- ///
- /// \returns a tuple consisting of the LegalizeAction that should be
- /// performed, the type-index it should be performed on and the destination
- /// type.
- std::tuple<LegalizeAction, unsigned, LLT>
- getAction(const MachineInstr &MI, const MachineRegisterInfo &MRI) const;
-
- /// Iterate the given function (typically something like doubling the width)
- /// on Ty until we find a legal type for this operation.
- LLT findLegalType(const InstrAspect &Aspect,
- std::function<LLT(LLT)> NextType) const {
- LegalizeAction Action;
- const TypeMap &Map = Actions[Aspect.Opcode - FirstOp][Aspect.Idx];
- LLT Ty = Aspect.Type;
- do {
- Ty = NextType(Ty);
- auto ActionIt = Map.find(Ty);
- if (ActionIt == Map.end())
- Action = DefaultActions.find(Aspect.Opcode)->second;
- else
- Action = ActionIt->second;
- } while(Action != Legal);
- return Ty;
- }
-
- /// Find what type it's actually OK to perform the given operation on, given
- /// the general approach we've decided to take.
- LLT findLegalType(const InstrAspect &Aspect, LegalizeAction Action) const;
-
- std::pair<LegalizeAction, LLT> findLegalAction(const InstrAspect &Aspect,
- LegalizeAction Action) const {
- return std::make_pair(Action, findLegalType(Aspect, Action));
- }
-
- /// Find the specified \p Aspect in the primary (explicitly set) Actions
- /// table. Returns either the action the target requested or NotFound if there
- /// was no setAction call.
- LegalizeAction findInActions(const InstrAspect &Aspect) const {
- if (Aspect.Opcode < FirstOp || Aspect.Opcode > LastOp)
- return NotFound;
- if (Aspect.Idx >= Actions[Aspect.Opcode - FirstOp].size())
- return NotFound;
- const TypeMap &Map = Actions[Aspect.Opcode - FirstOp][Aspect.Idx];
- auto ActionIt = Map.find(Aspect.Type);
- if (ActionIt == Map.end())
- return NotFound;
-
- return ActionIt->second;
- }
-
- bool isLegal(const MachineInstr &MI, const MachineRegisterInfo &MRI) const;
-
-private:
- static const int FirstOp = TargetOpcode::PRE_ISEL_GENERIC_OPCODE_START;
- static const int LastOp = TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END;
-
- typedef DenseMap<LLT, LegalizeAction> TypeMap;
- typedef DenseMap<std::pair<unsigned, LLT>, LegalizeAction> SIVActionMap;
-
- SmallVector<TypeMap, 1> Actions[LastOp - FirstOp + 1];
- SIVActionMap ScalarInVectorActions;
- DenseMap<std::pair<unsigned, LLT>, uint16_t> MaxLegalVectorElts;
- DenseMap<unsigned, LegalizeAction> DefaultActions;
-
- bool TablesInitialized;
-};
-
-
-} // End namespace llvm.
-
-#endif
Modified: llvm/trunk/include/llvm/InitializePasses.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/InitializePasses.h?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/include/llvm/InitializePasses.h (original)
+++ llvm/trunk/include/llvm/InitializePasses.h Fri Oct 14 17:18:18 2016
@@ -171,6 +171,7 @@ void initializeLegacyLICMPassPass(PassRe
void initializeLazyBranchProbabilityInfoPassPass(PassRegistry&);
void initializeLazyBlockFrequencyInfoPassPass(PassRegistry&);
void initializeLazyValueInfoWrapperPassPass(PassRegistry&);
+void initializeLegalizerPass(PassRegistry&);
void initializeLintPass(PassRegistry&);
void initializeLiveDebugValuesPass(PassRegistry&);
void initializeLiveDebugVariablesPass(PassRegistry&);
@@ -222,7 +223,6 @@ void initializeMachineCopyPropagationPas
void initializeMachineDominanceFrontierPass(PassRegistry&);
void initializeMachineDominatorTreePass(PassRegistry&);
void initializeMachineFunctionPrinterPassPass(PassRegistry&);
-void initializeMachineLegalizePassPass(PassRegistry&);
void initializeMachineLICMPass(PassRegistry&);
void initializeMachineLoopInfoPass(PassRegistry&);
void initializeMachineModuleInfoPass(PassRegistry&);
Modified: llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetSubtargetInfo.h Fri Oct 14 17:18:18 2016
@@ -26,9 +26,9 @@ namespace llvm {
class CallLowering;
class DataLayout;
class InstructionSelector;
+class LegalizerInfo;
class MachineFunction;
class MachineInstr;
-class MachineLegalizer;
class RegisterBankInfo;
class SDep;
class SUnit;
@@ -107,9 +107,7 @@ public:
return nullptr;
}
- virtual const MachineLegalizer *getMachineLegalizer() const {
- return nullptr;
- }
+ virtual const LegalizerInfo *getLegalizerInfo() const { return nullptr; }
/// getRegisterInfo - If register information is available, return it. If
/// not, return null.
Modified: llvm/trunk/lib/CodeGen/GlobalISel/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/CMakeLists.txt?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/CMakeLists.txt (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/CMakeLists.txt Fri Oct 14 17:18:18 2016
@@ -5,9 +5,9 @@ set(GLOBAL_ISEL_FILES
InstructionSelect.cpp
InstructionSelector.cpp
MachineIRBuilder.cpp
- MachineLegalizeHelper.cpp
- MachineLegalizePass.cpp
- MachineLegalizer.cpp
+ LegalizerHelper.cpp
+ Legalizer.cpp
+ LegalizerInfo.cpp
RegBankSelect.cpp
RegisterBank.cpp
RegisterBankInfo.cpp
Modified: llvm/trunk/lib/CodeGen/GlobalISel/GlobalISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/GlobalISel.cpp?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/GlobalISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/GlobalISel.cpp Fri Oct 14 17:18:18 2016
@@ -25,7 +25,7 @@ void llvm::initializeGlobalISel(PassRegi
void llvm::initializeGlobalISel(PassRegistry &Registry) {
initializeIRTranslatorPass(Registry);
- initializeMachineLegalizePassPass(Registry);
+ initializeLegalizerPass(Registry);
initializeRegBankSelectPass(Registry);
initializeInstructionSelectPass(Registry);
}
Modified: llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp Fri Oct 14 17:18:18 2016
@@ -14,7 +14,7 @@
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/ADT/Twine.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
-#include "llvm/CodeGen/GlobalISel/MachineLegalizer.h"
+#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/Function.h"
@@ -71,12 +71,12 @@ bool InstructionSelect::runOnMachineFunc
// Check that our input is fully legal: we require the function to have the
// Legalized property, so it should be.
// FIXME: This should be in the MachineVerifier, but it can't use the
- // MachineLegalizer as it's currently in the separate GlobalISel library.
+ // LegalizerInfo as it's currently in the separate GlobalISel library.
// The RegBankSelected property is already checked in the verifier. Note
// that it has the same layering problem, but we only use inline methods so
// end up not needing to link against the GlobalISel library.
const MachineRegisterInfo &MRI = MF.getRegInfo();
- if (const MachineLegalizer *MLI = MF.getSubtarget().getMachineLegalizer())
+ if (const LegalizerInfo *MLI = MF.getSubtarget().getLegalizerInfo())
for (const MachineBasicBlock &MBB : MF)
for (const MachineInstr &MI : MBB)
if (isPreISelGenericOpcode(MI.getOpcode()) && !MLI->isLegal(MI, MRI))
Copied: llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp (from r284281, llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizePass.cpp)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp?p2=llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp&p1=llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizePass.cpp&r1=284281&r2=284287&rev=284287&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizePass.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/Legalizer.cpp Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-//===-- llvm/CodeGen/GlobalISel/MachineLegalizePass.cpp -------------------===//
+//===-- llvm/CodeGen/GlobalISel/Legalizer.cpp -----------------------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -7,49 +7,48 @@
//
//===----------------------------------------------------------------------===//
//
-/// \file This file implements the LegalizeHelper class to legalize individual
-/// instructions and the MachineLegalizePass wrapper pass for the primary
+/// \file This file implements the LegalizerHelper class to legalize individual
+/// instructions and the LegalizePass wrapper pass for the primary
/// legalization.
//
//===----------------------------------------------------------------------===//
-#include "llvm/CodeGen/GlobalISel/MachineLegalizePass.h"
-#include "llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h"
-#include "llvm/CodeGen/GlobalISel/MachineLegalizer.h"
+#include "llvm/CodeGen/GlobalISel/Legalizer.h"
+#include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
+#include "llvm/CodeGen/GlobalISel/Legalizer.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/Support/Debug.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
-#define DEBUG_TYPE "legalize-mir"
+#define DEBUG_TYPE "legalizer"
using namespace llvm;
-char MachineLegalizePass::ID = 0;
-INITIALIZE_PASS_BEGIN(MachineLegalizePass, DEBUG_TYPE,
+char Legalizer::ID = 0;
+INITIALIZE_PASS_BEGIN(Legalizer, DEBUG_TYPE,
"Legalize the Machine IR a function's Machine IR", false,
false)
INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
-INITIALIZE_PASS_END(MachineLegalizePass, DEBUG_TYPE,
+INITIALIZE_PASS_END(Legalizer, DEBUG_TYPE,
"Legalize the Machine IR a function's Machine IR", false,
false)
-MachineLegalizePass::MachineLegalizePass() : MachineFunctionPass(ID) {
- initializeMachineLegalizePassPass(*PassRegistry::getPassRegistry());
+Legalizer::Legalizer() : MachineFunctionPass(ID) {
+ initializeLegalizerPass(*PassRegistry::getPassRegistry());
}
-void MachineLegalizePass::getAnalysisUsage(AnalysisUsage &AU) const {
+void Legalizer::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addRequired<TargetPassConfig>();
MachineFunctionPass::getAnalysisUsage(AU);
}
-void MachineLegalizePass::init(MachineFunction &MF) {
+void Legalizer::init(MachineFunction &MF) {
}
-bool MachineLegalizePass::combineExtracts(MachineInstr &MI,
- MachineRegisterInfo &MRI,
- const TargetInstrInfo &TII) {
+bool Legalizer::combineExtracts(MachineInstr &MI, MachineRegisterInfo &MRI,
+ const TargetInstrInfo &TII) {
bool Changed = false;
if (MI.getOpcode() != TargetOpcode::G_EXTRACT)
return Changed;
@@ -115,7 +114,7 @@ bool MachineLegalizePass::combineExtract
return Changed;
}
-bool MachineLegalizePass::runOnMachineFunction(MachineFunction &MF) {
+bool Legalizer::runOnMachineFunction(MachineFunction &MF) {
// If the ISel pipeline failed, do not bother running that pass.
if (MF.getProperties().hasProperty(
MachineFunctionProperties::Property::FailedISel))
@@ -123,8 +122,8 @@ bool MachineLegalizePass::runOnMachineFu
DEBUG(dbgs() << "Legalize Machine IR for: " << MF.getName() << '\n');
init(MF);
const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();
- const MachineLegalizer &Legalizer = *MF.getSubtarget().getMachineLegalizer();
- MachineLegalizeHelper Helper(MF);
+ const LegalizerInfo &LegalizerInfo = *MF.getSubtarget().getLegalizerInfo();
+ LegalizerHelper Helper(MF);
// FIXME: an instruction may need more than one pass before it is legal. For
// example on most architectures <3 x i3> is doubly-illegal. It would
@@ -144,11 +143,11 @@ bool MachineLegalizePass::runOnMachineFu
if (!isPreISelGenericOpcode(MI->getOpcode()))
continue;
- auto Res = Helper.legalizeInstr(*MI, Legalizer);
+ auto Res = Helper.legalizeInstr(*MI, LegalizerInfo);
// Error out if we couldn't legalize this instruction. We may want to fall
// back to DAG ISel instead in the future.
- if (Res == MachineLegalizeHelper::UnableToLegalize) {
+ if (Res == LegalizerHelper::UnableToLegalize) {
if (!TPC.isGlobalISelAbortEnabled()) {
MF.getProperties().set(
MachineFunctionProperties::Property::FailedISel);
@@ -161,7 +160,7 @@ bool MachineLegalizePass::runOnMachineFu
report_fatal_error(OS.str());
}
- Changed |= Res == MachineLegalizeHelper::Legalized;
+ Changed |= Res == LegalizerHelper::Legalized;
}
Copied: llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (from r284281, llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp?p2=llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp&p1=llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp&r1=284281&r2=284287&rev=284287&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-//===-- llvm/CodeGen/GlobalISel/MachineLegalizeHelper.cpp -----------------===//
+//===-- llvm/CodeGen/GlobalISel/LegalizerHelper.cpp -----------------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -7,15 +7,15 @@
//
//===----------------------------------------------------------------------===//
//
-/// \file This file implements the MachineLegalizeHelper class to legalize
+/// \file This file implements the LegalizerHelper class to legalize
/// individual instructions and the LegalizeMachineIR wrapper pass for the
/// primary legalization.
//
//===----------------------------------------------------------------------===//
-#include "llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h"
+#include "llvm/CodeGen/GlobalISel/LegalizerHelper.h"
#include "llvm/CodeGen/GlobalISel/CallLowering.h"
-#include "llvm/CodeGen/GlobalISel/MachineLegalizer.h"
+#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
@@ -28,36 +28,36 @@
using namespace llvm;
-MachineLegalizeHelper::MachineLegalizeHelper(MachineFunction &MF)
+LegalizerHelper::LegalizerHelper(MachineFunction &MF)
: MRI(MF.getRegInfo()) {
MIRBuilder.setMF(MF);
}
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::legalizeInstrStep(MachineInstr &MI,
- const MachineLegalizer &Legalizer) {
- auto Action = Legalizer.getAction(MI, MRI);
+LegalizerHelper::LegalizeResult
+LegalizerHelper::legalizeInstrStep(MachineInstr &MI,
+ const LegalizerInfo &LegalizerInfo) {
+ auto Action = LegalizerInfo.getAction(MI, MRI);
switch (std::get<0>(Action)) {
- case MachineLegalizer::Legal:
+ case LegalizerInfo::Legal:
return AlreadyLegal;
- case MachineLegalizer::Libcall:
+ case LegalizerInfo::Libcall:
return libcall(MI);
- case MachineLegalizer::NarrowScalar:
+ case LegalizerInfo::NarrowScalar:
return narrowScalar(MI, std::get<1>(Action), std::get<2>(Action));
- case MachineLegalizer::WidenScalar:
+ case LegalizerInfo::WidenScalar:
return widenScalar(MI, std::get<1>(Action), std::get<2>(Action));
- case MachineLegalizer::Lower:
+ case LegalizerInfo::Lower:
return lower(MI, std::get<1>(Action), std::get<2>(Action));
- case MachineLegalizer::FewerElements:
+ case LegalizerInfo::FewerElements:
return fewerElementsVector(MI, std::get<1>(Action), std::get<2>(Action));
default:
return UnableToLegalize;
}
}
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::legalizeInstr(MachineInstr &MI,
- const MachineLegalizer &Legalizer) {
+LegalizerHelper::LegalizeResult
+LegalizerHelper::legalizeInstr(MachineInstr &MI,
+ const LegalizerInfo &LegalizerInfo) {
SmallVector<MachineInstr *, 4> WorkList;
MIRBuilder.recordInsertions(
[&](MachineInstr *MI) { WorkList.push_back(MI); });
@@ -67,7 +67,7 @@ MachineLegalizeHelper::legalizeInstr(Mac
LegalizeResult Res;
unsigned Idx = 0;
do {
- Res = legalizeInstrStep(*WorkList[Idx], Legalizer);
+ Res = legalizeInstrStep(*WorkList[Idx], LegalizerInfo);
if (Res == UnableToLegalize) {
MIRBuilder.stopRecordingInsertions();
return UnableToLegalize;
@@ -81,8 +81,8 @@ MachineLegalizeHelper::legalizeInstr(Mac
return Changed ? Legalized : AlreadyLegal;
}
-void MachineLegalizeHelper::extractParts(unsigned Reg, LLT Ty, int NumParts,
- SmallVectorImpl<unsigned> &VRegs) {
+void LegalizerHelper::extractParts(unsigned Reg, LLT Ty, int NumParts,
+ SmallVectorImpl<unsigned> &VRegs) {
unsigned Size = Ty.getSizeInBits();
SmallVector<uint64_t, 4> Indexes;
for (int i = 0; i < NumParts; ++i) {
@@ -92,8 +92,8 @@ void MachineLegalizeHelper::extractParts
MIRBuilder.buildExtract(VRegs, Indexes, Reg);
}
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::libcall(MachineInstr &MI) {
+LegalizerHelper::LegalizeResult
+LegalizerHelper::libcall(MachineInstr &MI) {
LLT Ty = MRI.getType(MI.getOperand(0).getReg());
unsigned Size = Ty.getSizeInBits();
MIRBuilder.setInstr(MI);
@@ -119,9 +119,9 @@ MachineLegalizeHelper::libcall(MachineIn
}
}
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::narrowScalar(MachineInstr &MI, unsigned TypeIdx,
- LLT NarrowTy) {
+LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI,
+ unsigned TypeIdx,
+ LLT NarrowTy) {
// FIXME: Don't know how to handle secondary types yet.
if (TypeIdx != 0)
return UnableToLegalize;
@@ -163,9 +163,8 @@ MachineLegalizeHelper::narrowScalar(Mach
}
}
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx,
- LLT WideTy) {
+LegalizerHelper::LegalizeResult
+LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
MIRBuilder.setInstr(MI);
switch (MI.getOpcode()) {
@@ -293,8 +292,8 @@ MachineLegalizeHelper::widenScalar(Machi
}
}
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty) {
+LegalizerHelper::LegalizeResult
+LegalizerHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty) {
using namespace TargetOpcode;
MIRBuilder.setInstr(MI);
@@ -319,9 +318,9 @@ MachineLegalizeHelper::lower(MachineInst
}
}
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
- LLT NarrowTy) {
+LegalizerHelper::LegalizeResult
+LegalizerHelper::fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
+ LLT NarrowTy) {
// FIXME: Don't know how to handle secondary types yet.
if (TypeIdx != 0)
return UnableToLegalize;
Copied: llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp (from r284281, llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizer.cpp)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp?p2=llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp&p1=llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizer.cpp&r1=284281&r2=284287&rev=284287&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizer.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/LegalizerInfo.cpp Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-//===---- lib/CodeGen/GlobalISel/MachineLegalizer.cpp - IRTranslator -------==//
+//===---- lib/CodeGen/GlobalISel/LegalizerInfo.cpp - Legalizer -------==//
//
// The LLVM Compiler Infrastructure
//
@@ -17,7 +17,7 @@
//
//===----------------------------------------------------------------------===//
-#include "llvm/CodeGen/GlobalISel/MachineLegalizer.h"
+#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
#include "llvm/ADT/SmallBitVector.h"
#include "llvm/CodeGen/MachineInstr.h"
@@ -27,7 +27,7 @@
#include "llvm/Target/TargetOpcodes.h"
using namespace llvm;
-MachineLegalizer::MachineLegalizer() : TablesInitialized(false) {
+LegalizerInfo::LegalizerInfo() : TablesInitialized(false) {
// FIXME: these two can be legalized to the fundamental load/store Jakob
// proposed. Once loads & stores are supported.
DefaultActions[TargetOpcode::G_ANYEXT] = Legal;
@@ -41,7 +41,7 @@ MachineLegalizer::MachineLegalizer() : T
DefaultActions[TargetOpcode::G_BRCOND] = WidenScalar;
}
-void MachineLegalizer::computeTables() {
+void LegalizerInfo::computeTables() {
for (unsigned Opcode = 0; Opcode <= LastOp - FirstOp; ++Opcode) {
for (unsigned Idx = 0; Idx != Actions[Opcode].size(); ++Idx) {
for (auto &Action : Actions[Opcode][Idx]) {
@@ -63,8 +63,8 @@ void MachineLegalizer::computeTables() {
// probably going to need specialized lookup structures for various types before
// we have any hope of doing well with something like <13 x i3>. Even the common
// cases should do better than what we have now.
-std::pair<MachineLegalizer::LegalizeAction, LLT>
-MachineLegalizer::getAction(const InstrAspect &Aspect) const {
+std::pair<LegalizerInfo::LegalizeAction, LLT>
+LegalizerInfo::getAction(const InstrAspect &Aspect) const {
assert(TablesInitialized && "backend forgot to call computeTables");
// These *have* to be implemented for now, they're the fundamental basis of
// how everything else is transformed.
@@ -113,9 +113,9 @@ MachineLegalizer::getAction(const InstrA
return findLegalAction(Aspect, FewerElements);
}
-std::tuple<MachineLegalizer::LegalizeAction, unsigned, LLT>
-MachineLegalizer::getAction(const MachineInstr &MI,
- const MachineRegisterInfo &MRI) const {
+std::tuple<LegalizerInfo::LegalizeAction, unsigned, LLT>
+LegalizerInfo::getAction(const MachineInstr &MI,
+ const MachineRegisterInfo &MRI) const {
SmallBitVector SeenTypes(8);
const MCOperandInfo *OpInfo = MI.getDesc().OpInfo;
for (unsigned i = 0; i < MI.getDesc().getNumOperands(); ++i) {
@@ -138,13 +138,13 @@ MachineLegalizer::getAction(const Machin
return std::make_tuple(Legal, 0, LLT{});
}
-bool MachineLegalizer::isLegal(const MachineInstr &MI,
- const MachineRegisterInfo &MRI) const {
+bool LegalizerInfo::isLegal(const MachineInstr &MI,
+ const MachineRegisterInfo &MRI) const {
return std::get<0>(getAction(MI, MRI)) == Legal;
}
-LLT MachineLegalizer::findLegalType(const InstrAspect &Aspect,
- LegalizeAction Action) const {
+LLT LegalizerInfo::findLegalType(const InstrAspect &Aspect,
+ LegalizeAction Action) const {
switch(Action) {
default:
llvm_unreachable("Cannot find legal type");
Removed: llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp?rev=284286&view=auto
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp (removed)
@@ -1,355 +0,0 @@
-//===-- llvm/CodeGen/GlobalISel/MachineLegalizeHelper.cpp -----------------===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file This file implements the MachineLegalizeHelper class to legalize
-/// individual instructions and the LegalizeMachineIR wrapper pass for the
-/// primary legalization.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h"
-#include "llvm/CodeGen/GlobalISel/CallLowering.h"
-#include "llvm/CodeGen/GlobalISel/MachineLegalizer.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetLowering.h"
-#include "llvm/Target/TargetSubtargetInfo.h"
-
-#include <sstream>
-
-#define DEBUG_TYPE "legalize-mir"
-
-using namespace llvm;
-
-MachineLegalizeHelper::MachineLegalizeHelper(MachineFunction &MF)
- : MRI(MF.getRegInfo()) {
- MIRBuilder.setMF(MF);
-}
-
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::legalizeInstrStep(MachineInstr &MI,
- const MachineLegalizer &Legalizer) {
- auto Action = Legalizer.getAction(MI, MRI);
- switch (std::get<0>(Action)) {
- case MachineLegalizer::Legal:
- return AlreadyLegal;
- case MachineLegalizer::Libcall:
- return libcall(MI);
- case MachineLegalizer::NarrowScalar:
- return narrowScalar(MI, std::get<1>(Action), std::get<2>(Action));
- case MachineLegalizer::WidenScalar:
- return widenScalar(MI, std::get<1>(Action), std::get<2>(Action));
- case MachineLegalizer::Lower:
- return lower(MI, std::get<1>(Action), std::get<2>(Action));
- case MachineLegalizer::FewerElements:
- return fewerElementsVector(MI, std::get<1>(Action), std::get<2>(Action));
- default:
- return UnableToLegalize;
- }
-}
-
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::legalizeInstr(MachineInstr &MI,
- const MachineLegalizer &Legalizer) {
- SmallVector<MachineInstr *, 4> WorkList;
- MIRBuilder.recordInsertions(
- [&](MachineInstr *MI) { WorkList.push_back(MI); });
- WorkList.push_back(&MI);
-
- bool Changed = false;
- LegalizeResult Res;
- unsigned Idx = 0;
- do {
- Res = legalizeInstrStep(*WorkList[Idx], Legalizer);
- if (Res == UnableToLegalize) {
- MIRBuilder.stopRecordingInsertions();
- return UnableToLegalize;
- }
- Changed |= Res == Legalized;
- ++Idx;
- } while (Idx < WorkList.size());
-
- MIRBuilder.stopRecordingInsertions();
-
- return Changed ? Legalized : AlreadyLegal;
-}
-
-void MachineLegalizeHelper::extractParts(unsigned Reg, LLT Ty, int NumParts,
- SmallVectorImpl<unsigned> &VRegs) {
- unsigned Size = Ty.getSizeInBits();
- SmallVector<uint64_t, 4> Indexes;
- for (int i = 0; i < NumParts; ++i) {
- VRegs.push_back(MRI.createGenericVirtualRegister(Ty));
- Indexes.push_back(i * Size);
- }
- MIRBuilder.buildExtract(VRegs, Indexes, Reg);
-}
-
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::libcall(MachineInstr &MI) {
- LLT Ty = MRI.getType(MI.getOperand(0).getReg());
- unsigned Size = Ty.getSizeInBits();
- MIRBuilder.setInstr(MI);
-
- switch (MI.getOpcode()) {
- default:
- return UnableToLegalize;
- case TargetOpcode::G_FREM: {
- auto &Ctx = MIRBuilder.getMF().getFunction()->getContext();
- Type *Ty = Size == 64 ? Type::getDoubleTy(Ctx) : Type::getFloatTy(Ctx);
- auto &CLI = *MIRBuilder.getMF().getSubtarget().getCallLowering();
- auto &TLI = *MIRBuilder.getMF().getSubtarget().getTargetLowering();
- const char *Name =
- TLI.getLibcallName(Size == 64 ? RTLIB::REM_F64 : RTLIB::REM_F32);
-
- CLI.lowerCall(
- MIRBuilder, MachineOperand::CreateES(Name),
- {MI.getOperand(0).getReg(), Ty},
- {{MI.getOperand(1).getReg(), Ty}, {MI.getOperand(2).getReg(), Ty}});
- MI.eraseFromParent();
- return Legalized;
- }
- }
-}
-
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::narrowScalar(MachineInstr &MI, unsigned TypeIdx,
- LLT NarrowTy) {
- // FIXME: Don't know how to handle secondary types yet.
- if (TypeIdx != 0)
- return UnableToLegalize;
- switch (MI.getOpcode()) {
- default:
- return UnableToLegalize;
- case TargetOpcode::G_ADD: {
- // Expand in terms of carry-setting/consuming G_ADDE instructions.
- unsigned NarrowSize = NarrowTy.getSizeInBits();
- int NumParts = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits() /
- NarrowTy.getSizeInBits();
-
- MIRBuilder.setInstr(MI);
-
- SmallVector<unsigned, 2> Src1Regs, Src2Regs, DstRegs;
- SmallVector<uint64_t, 2> Indexes;
- extractParts(MI.getOperand(1).getReg(), NarrowTy, NumParts, Src1Regs);
- extractParts(MI.getOperand(2).getReg(), NarrowTy, NumParts, Src2Regs);
-
- unsigned CarryIn = MRI.createGenericVirtualRegister(LLT::scalar(1));
- MIRBuilder.buildConstant(CarryIn, 0);
-
- for (int i = 0; i < NumParts; ++i) {
- unsigned DstReg = MRI.createGenericVirtualRegister(NarrowTy);
- unsigned CarryOut = MRI.createGenericVirtualRegister(LLT::scalar(1));
-
- MIRBuilder.buildUAdde(DstReg, CarryOut, Src1Regs[i],
- Src2Regs[i], CarryIn);
-
- DstRegs.push_back(DstReg);
- Indexes.push_back(i * NarrowSize);
- CarryIn = CarryOut;
- }
- unsigned DstReg = MI.getOperand(0).getReg();
- MIRBuilder.buildSequence(DstReg, DstRegs, Indexes);
- MI.eraseFromParent();
- return Legalized;
- }
- }
-}
-
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx,
- LLT WideTy) {
- MIRBuilder.setInstr(MI);
-
- switch (MI.getOpcode()) {
- default:
- return UnableToLegalize;
- case TargetOpcode::G_ADD:
- case TargetOpcode::G_AND:
- case TargetOpcode::G_MUL:
- case TargetOpcode::G_OR:
- case TargetOpcode::G_XOR:
- case TargetOpcode::G_SUB: {
- // Perform operation at larger width (any extension is fine here, high bits
- // don't affect the result) and then truncate the result back to the
- // original type.
- unsigned Src1Ext = MRI.createGenericVirtualRegister(WideTy);
- unsigned Src2Ext = MRI.createGenericVirtualRegister(WideTy);
- MIRBuilder.buildAnyExt(Src1Ext, MI.getOperand(1).getReg());
- MIRBuilder.buildAnyExt(Src2Ext, MI.getOperand(2).getReg());
-
- unsigned DstExt = MRI.createGenericVirtualRegister(WideTy);
- MIRBuilder.buildInstr(MI.getOpcode())
- .addDef(DstExt)
- .addUse(Src1Ext)
- .addUse(Src2Ext);
-
- MIRBuilder.buildTrunc(MI.getOperand(0).getReg(), DstExt);
- MI.eraseFromParent();
- return Legalized;
- }
- case TargetOpcode::G_SDIV:
- case TargetOpcode::G_UDIV: {
- unsigned ExtOp = MI.getOpcode() == TargetOpcode::G_SDIV
- ? TargetOpcode::G_SEXT
- : TargetOpcode::G_ZEXT;
-
- unsigned LHSExt = MRI.createGenericVirtualRegister(WideTy);
- MIRBuilder.buildInstr(ExtOp).addDef(LHSExt).addUse(
- MI.getOperand(1).getReg());
-
- unsigned RHSExt = MRI.createGenericVirtualRegister(WideTy);
- MIRBuilder.buildInstr(ExtOp).addDef(RHSExt).addUse(
- MI.getOperand(2).getReg());
-
- unsigned ResExt = MRI.createGenericVirtualRegister(WideTy);
- MIRBuilder.buildInstr(MI.getOpcode())
- .addDef(ResExt)
- .addUse(LHSExt)
- .addUse(RHSExt);
-
- MIRBuilder.buildTrunc(MI.getOperand(0).getReg(), ResExt);
- MI.eraseFromParent();
- return Legalized;
- }
- case TargetOpcode::G_LOAD: {
- assert(alignTo(MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(), 8) ==
- WideTy.getSizeInBits() &&
- "illegal to increase number of bytes loaded");
-
- unsigned DstExt = MRI.createGenericVirtualRegister(WideTy);
- MIRBuilder.buildLoad(DstExt, MI.getOperand(1).getReg(),
- **MI.memoperands_begin());
- MIRBuilder.buildTrunc(MI.getOperand(0).getReg(), DstExt);
- MI.eraseFromParent();
- return Legalized;
- }
- case TargetOpcode::G_STORE: {
- assert(alignTo(MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(), 8) ==
- WideTy.getSizeInBits() &&
- "illegal to increase number of bytes modified by a store");
-
- unsigned SrcExt = MRI.createGenericVirtualRegister(WideTy);
- MIRBuilder.buildAnyExt(SrcExt, MI.getOperand(0).getReg());
- MIRBuilder.buildStore(SrcExt, MI.getOperand(1).getReg(),
- **MI.memoperands_begin());
- MI.eraseFromParent();
- return Legalized;
- }
- case TargetOpcode::G_CONSTANT: {
- unsigned DstExt = MRI.createGenericVirtualRegister(WideTy);
- MIRBuilder.buildConstant(DstExt, MI.getOperand(1).getImm());
- MIRBuilder.buildTrunc(MI.getOperand(0).getReg(), DstExt);
- MI.eraseFromParent();
- return Legalized;
- }
- case TargetOpcode::G_FCONSTANT: {
- unsigned DstExt = MRI.createGenericVirtualRegister(WideTy);
- MIRBuilder.buildFConstant(DstExt, *MI.getOperand(1).getFPImm());
- MIRBuilder.buildFPTrunc(MI.getOperand(0).getReg(), DstExt);
- MI.eraseFromParent();
- return Legalized;
- }
- case TargetOpcode::G_BRCOND: {
- unsigned TstExt = MRI.createGenericVirtualRegister(WideTy);
- MIRBuilder.buildAnyExt(TstExt, MI.getOperand(0).getReg());
- MIRBuilder.buildBrCond(TstExt, *MI.getOperand(1).getMBB());
- MI.eraseFromParent();
- return Legalized;
- }
- case TargetOpcode::G_ICMP: {
- assert(TypeIdx == 1 && "unable to legalize predicate");
- bool IsSigned = CmpInst::isSigned(
- static_cast<CmpInst::Predicate>(MI.getOperand(1).getPredicate()));
- unsigned Op0Ext = MRI.createGenericVirtualRegister(WideTy);
- unsigned Op1Ext = MRI.createGenericVirtualRegister(WideTy);
- if (IsSigned) {
- MIRBuilder.buildSExt(Op0Ext, MI.getOperand(2).getReg());
- MIRBuilder.buildSExt(Op1Ext, MI.getOperand(3).getReg());
- } else {
- MIRBuilder.buildZExt(Op0Ext, MI.getOperand(2).getReg());
- MIRBuilder.buildZExt(Op1Ext, MI.getOperand(3).getReg());
- }
- MIRBuilder.buildICmp(
- static_cast<CmpInst::Predicate>(MI.getOperand(1).getPredicate()),
- MI.getOperand(0).getReg(), Op0Ext, Op1Ext);
- MI.eraseFromParent();
- return Legalized;
- }
- case TargetOpcode::G_GEP: {
- assert(TypeIdx == 1 && "unable to legalize pointer of GEP");
- unsigned OffsetExt = MRI.createGenericVirtualRegister(WideTy);
- MIRBuilder.buildSExt(OffsetExt, MI.getOperand(2).getReg());
- MI.getOperand(2).setReg(OffsetExt);
- return Legalized;
- }
- }
-}
-
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty) {
- using namespace TargetOpcode;
- MIRBuilder.setInstr(MI);
-
- switch(MI.getOpcode()) {
- default:
- return UnableToLegalize;
- case TargetOpcode::G_SREM:
- case TargetOpcode::G_UREM: {
- unsigned QuotReg = MRI.createGenericVirtualRegister(Ty);
- MIRBuilder.buildInstr(MI.getOpcode() == G_SREM ? G_SDIV : G_UDIV)
- .addDef(QuotReg)
- .addUse(MI.getOperand(1).getReg())
- .addUse(MI.getOperand(2).getReg());
-
- unsigned ProdReg = MRI.createGenericVirtualRegister(Ty);
- MIRBuilder.buildMul(ProdReg, QuotReg, MI.getOperand(2).getReg());
- MIRBuilder.buildSub(MI.getOperand(0).getReg(), MI.getOperand(1).getReg(),
- ProdReg);
- MI.eraseFromParent();
- return Legalized;
- }
- }
-}
-
-MachineLegalizeHelper::LegalizeResult
-MachineLegalizeHelper::fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
- LLT NarrowTy) {
- // FIXME: Don't know how to handle secondary types yet.
- if (TypeIdx != 0)
- return UnableToLegalize;
- switch (MI.getOpcode()) {
- default:
- return UnableToLegalize;
- case TargetOpcode::G_ADD: {
- unsigned NarrowSize = NarrowTy.getSizeInBits();
- unsigned DstReg = MI.getOperand(0).getReg();
- int NumParts = MRI.getType(DstReg).getSizeInBits() / NarrowSize;
-
- MIRBuilder.setInstr(MI);
-
- SmallVector<unsigned, 2> Src1Regs, Src2Regs, DstRegs;
- SmallVector<uint64_t, 2> Indexes;
- extractParts(MI.getOperand(1).getReg(), NarrowTy, NumParts, Src1Regs);
- extractParts(MI.getOperand(2).getReg(), NarrowTy, NumParts, Src2Regs);
-
- for (int i = 0; i < NumParts; ++i) {
- unsigned DstReg = MRI.createGenericVirtualRegister(NarrowTy);
- MIRBuilder.buildAdd(DstReg, Src1Regs[i], Src2Regs[i]);
- DstRegs.push_back(DstReg);
- Indexes.push_back(i * NarrowSize);
- }
-
- MIRBuilder.buildSequence(DstReg, DstRegs, Indexes);
- MI.eraseFromParent();
- return Legalized;
- }
- }
-}
Removed: llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizePass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizePass.cpp?rev=284286&view=auto
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizePass.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizePass.cpp (removed)
@@ -1,181 +0,0 @@
-//===-- llvm/CodeGen/GlobalISel/MachineLegalizePass.cpp -------------------===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file This file implements the LegalizeHelper class to legalize individual
-/// instructions and the MachineLegalizePass wrapper pass for the primary
-/// legalization.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/CodeGen/GlobalISel/MachineLegalizePass.h"
-#include "llvm/CodeGen/GlobalISel/MachineLegalizeHelper.h"
-#include "llvm/CodeGen/GlobalISel/MachineLegalizer.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/TargetPassConfig.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetSubtargetInfo.h"
-
-#define DEBUG_TYPE "legalize-mir"
-
-using namespace llvm;
-
-char MachineLegalizePass::ID = 0;
-INITIALIZE_PASS_BEGIN(MachineLegalizePass, DEBUG_TYPE,
- "Legalize the Machine IR a function's Machine IR", false,
- false)
-INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
-INITIALIZE_PASS_END(MachineLegalizePass, DEBUG_TYPE,
- "Legalize the Machine IR a function's Machine IR", false,
- false)
-
-MachineLegalizePass::MachineLegalizePass() : MachineFunctionPass(ID) {
- initializeMachineLegalizePassPass(*PassRegistry::getPassRegistry());
-}
-
-void MachineLegalizePass::getAnalysisUsage(AnalysisUsage &AU) const {
- AU.addRequired<TargetPassConfig>();
- MachineFunctionPass::getAnalysisUsage(AU);
-}
-
-void MachineLegalizePass::init(MachineFunction &MF) {
-}
-
-bool MachineLegalizePass::combineExtracts(MachineInstr &MI,
- MachineRegisterInfo &MRI,
- const TargetInstrInfo &TII) {
- bool Changed = false;
- if (MI.getOpcode() != TargetOpcode::G_EXTRACT)
- return Changed;
-
- unsigned NumDefs = (MI.getNumOperands() - 1) / 2;
- unsigned SrcReg = MI.getOperand(NumDefs).getReg();
- MachineInstr &SeqI = *MRI.def_instr_begin(SrcReg);
- if (SeqI.getOpcode() != TargetOpcode::G_SEQUENCE)
- return Changed;
-
- unsigned NumSeqSrcs = (SeqI.getNumOperands() - 1) / 2;
- bool AllDefsReplaced = true;
-
- // Try to match each register extracted with a corresponding insertion formed
- // by the G_SEQUENCE.
- for (unsigned Idx = 0, SeqIdx = 0; Idx < NumDefs; ++Idx) {
- MachineOperand &ExtractMO = MI.getOperand(Idx);
- assert(ExtractMO.isReg() && ExtractMO.isDef() &&
- "unexpected extract operand");
-
- unsigned ExtractReg = ExtractMO.getReg();
- unsigned ExtractPos = MI.getOperand(NumDefs + Idx + 1).getImm();
-
- while (SeqIdx < NumSeqSrcs &&
- SeqI.getOperand(2 * SeqIdx + 2).getImm() < ExtractPos)
- ++SeqIdx;
-
- if (SeqIdx == NumSeqSrcs) {
- AllDefsReplaced = false;
- continue;
- }
-
- unsigned OrigReg = SeqI.getOperand(2 * SeqIdx + 1).getReg();
- if (SeqI.getOperand(2 * SeqIdx + 2).getImm() != ExtractPos ||
- MRI.getType(OrigReg) != MRI.getType(ExtractReg)) {
- AllDefsReplaced = false;
- continue;
- }
-
- assert(!TargetRegisterInfo::isPhysicalRegister(OrigReg) &&
- "unexpected physical register in G_SEQUENCE");
-
- // Finally we can replace the uses.
- for (auto &Use : MRI.use_operands(ExtractReg)) {
- Changed = true;
- Use.setReg(OrigReg);
- }
- }
-
- if (AllDefsReplaced) {
- // If SeqI was the next instruction in the BB and we removed it, we'd break
- // the outer iteration.
- assert(std::next(MachineBasicBlock::iterator(MI)) != SeqI &&
- "G_SEQUENCE does not dominate G_EXTRACT");
-
- MI.eraseFromParent();
-
- if (MRI.use_empty(SrcReg))
- SeqI.eraseFromParent();
- Changed = true;
- }
-
- return Changed;
-}
-
-bool MachineLegalizePass::runOnMachineFunction(MachineFunction &MF) {
- // If the ISel pipeline failed, do not bother running that pass.
- if (MF.getProperties().hasProperty(
- MachineFunctionProperties::Property::FailedISel))
- return false;
- DEBUG(dbgs() << "Legalize Machine IR for: " << MF.getName() << '\n');
- init(MF);
- const TargetPassConfig &TPC = getAnalysis<TargetPassConfig>();
- const MachineLegalizer &Legalizer = *MF.getSubtarget().getMachineLegalizer();
- MachineLegalizeHelper Helper(MF);
-
- // FIXME: an instruction may need more than one pass before it is legal. For
- // example on most architectures <3 x i3> is doubly-illegal. It would
- // typically proceed along a path like: <3 x i3> -> <3 x i8> -> <8 x i8>. We
- // probably want a worklist of instructions rather than naive iterate until
- // convergence for performance reasons.
- bool Changed = false;
- MachineBasicBlock::iterator NextMI;
- for (auto &MBB : MF)
- for (auto MI = MBB.begin(); MI != MBB.end(); MI = NextMI) {
- // Get the next Instruction before we try to legalize, because there's a
- // good chance MI will be deleted.
- NextMI = std::next(MI);
-
- // Only legalize pre-isel generic instructions: others don't have types
- // and are assumed to be legal.
- if (!isPreISelGenericOpcode(MI->getOpcode()))
- continue;
-
- auto Res = Helper.legalizeInstr(*MI, Legalizer);
-
- // Error out if we couldn't legalize this instruction. We may want to fall
- // back to DAG ISel instead in the future.
- if (Res == MachineLegalizeHelper::UnableToLegalize) {
- if (!TPC.isGlobalISelAbortEnabled()) {
- MF.getProperties().set(
- MachineFunctionProperties::Property::FailedISel);
- return false;
- }
- std::string Msg;
- raw_string_ostream OS(Msg);
- OS << "unable to legalize instruction: ";
- MI->print(OS);
- report_fatal_error(OS.str());
- }
-
- Changed |= Res == MachineLegalizeHelper::Legalized;
- }
-
-
- MachineRegisterInfo &MRI = MF.getRegInfo();
- const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
- for (auto &MBB : MF) {
- for (auto MI = MBB.begin(); MI != MBB.end(); MI = NextMI) {
- // Get the next Instruction before we try to legalize, because there's a
- // good chance MI will be deleted.
- NextMI = std::next(MI);
-
- Changed |= combineExtracts(*MI, MRI, TII);
- }
- }
-
- return Changed;
-}
Removed: llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizer.cpp?rev=284286&view=auto
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizer.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/MachineLegalizer.cpp (removed)
@@ -1,173 +0,0 @@
-//===---- lib/CodeGen/GlobalISel/MachineLegalizer.cpp - IRTranslator -------==//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// Implement an interface to specify and query how an illegal operation on a
-// given type should be expanded.
-//
-// Issues to be resolved:
-// + Make it fast.
-// + Support weird types like i3, <7 x i3>, ...
-// + Operations with more than one type (ICMP, CMPXCHG, intrinsics, ...)
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/CodeGen/GlobalISel/MachineLegalizer.h"
-
-#include "llvm/ADT/SmallBitVector.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/ValueTypes.h"
-#include "llvm/IR/Type.h"
-#include "llvm/Target/TargetOpcodes.h"
-using namespace llvm;
-
-MachineLegalizer::MachineLegalizer() : TablesInitialized(false) {
- // FIXME: these two can be legalized to the fundamental load/store Jakob
- // proposed. Once loads & stores are supported.
- DefaultActions[TargetOpcode::G_ANYEXT] = Legal;
- DefaultActions[TargetOpcode::G_TRUNC] = Legal;
-
- DefaultActions[TargetOpcode::G_INTRINSIC] = Legal;
- DefaultActions[TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS] = Legal;
-
- DefaultActions[TargetOpcode::G_ADD] = NarrowScalar;
-
- DefaultActions[TargetOpcode::G_BRCOND] = WidenScalar;
-}
-
-void MachineLegalizer::computeTables() {
- for (unsigned Opcode = 0; Opcode <= LastOp - FirstOp; ++Opcode) {
- for (unsigned Idx = 0; Idx != Actions[Opcode].size(); ++Idx) {
- for (auto &Action : Actions[Opcode][Idx]) {
- LLT Ty = Action.first;
- if (!Ty.isVector())
- continue;
-
- auto &Entry = MaxLegalVectorElts[std::make_pair(Opcode + FirstOp,
- Ty.getElementType())];
- Entry = std::max(Entry, Ty.getNumElements());
- }
- }
- }
-
- TablesInitialized = true;
-}
-
-// FIXME: inefficient implementation for now. Without ComputeValueVTs we're
-// probably going to need specialized lookup structures for various types before
-// we have any hope of doing well with something like <13 x i3>. Even the common
-// cases should do better than what we have now.
-std::pair<MachineLegalizer::LegalizeAction, LLT>
-MachineLegalizer::getAction(const InstrAspect &Aspect) const {
- assert(TablesInitialized && "backend forgot to call computeTables");
- // These *have* to be implemented for now, they're the fundamental basis of
- // how everything else is transformed.
-
- // FIXME: the long-term plan calls for expansion in terms of load/store (if
- // they're not legal).
- if (Aspect.Opcode == TargetOpcode::G_SEQUENCE ||
- Aspect.Opcode == TargetOpcode::G_EXTRACT)
- return std::make_pair(Legal, Aspect.Type);
-
- LegalizeAction Action = findInActions(Aspect);
- if (Action != NotFound)
- return findLegalAction(Aspect, Action);
-
- unsigned Opcode = Aspect.Opcode;
- LLT Ty = Aspect.Type;
- if (!Ty.isVector()) {
- auto DefaultAction = DefaultActions.find(Aspect.Opcode);
- if (DefaultAction != DefaultActions.end() && DefaultAction->second == Legal)
- return std::make_pair(Legal, Ty);
-
- assert(DefaultAction->second == NarrowScalar && "unexpected default");
- return findLegalAction(Aspect, NarrowScalar);
- }
-
- LLT EltTy = Ty.getElementType();
- int NumElts = Ty.getNumElements();
-
- auto ScalarAction = ScalarInVectorActions.find(std::make_pair(Opcode, EltTy));
- if (ScalarAction != ScalarInVectorActions.end() &&
- ScalarAction->second != Legal)
- return findLegalAction(Aspect, ScalarAction->second);
-
- // The element type is legal in principle, but the number of elements is
- // wrong.
- auto MaxLegalElts = MaxLegalVectorElts.lookup(std::make_pair(Opcode, EltTy));
- if (MaxLegalElts > NumElts)
- return findLegalAction(Aspect, MoreElements);
-
- if (MaxLegalElts == 0) {
- // Scalarize if there's no legal vector type, which is just a special case
- // of FewerElements.
- return std::make_pair(FewerElements, EltTy);
- }
-
- return findLegalAction(Aspect, FewerElements);
-}
-
-std::tuple<MachineLegalizer::LegalizeAction, unsigned, LLT>
-MachineLegalizer::getAction(const MachineInstr &MI,
- const MachineRegisterInfo &MRI) const {
- SmallBitVector SeenTypes(8);
- const MCOperandInfo *OpInfo = MI.getDesc().OpInfo;
- for (unsigned i = 0; i < MI.getDesc().getNumOperands(); ++i) {
- if (!OpInfo[i].isGenericType())
- continue;
-
- // We don't want to repeatedly check the same operand index, that
- // could get expensive.
- unsigned TypeIdx = OpInfo[i].getGenericTypeIndex();
- if (SeenTypes[TypeIdx])
- continue;
-
- SeenTypes.set(TypeIdx);
-
- LLT Ty = MRI.getType(MI.getOperand(i).getReg());
- auto Action = getAction({MI.getOpcode(), TypeIdx, Ty});
- if (Action.first != Legal)
- return std::make_tuple(Action.first, TypeIdx, Action.second);
- }
- return std::make_tuple(Legal, 0, LLT{});
-}
-
-bool MachineLegalizer::isLegal(const MachineInstr &MI,
- const MachineRegisterInfo &MRI) const {
- return std::get<0>(getAction(MI, MRI)) == Legal;
-}
-
-LLT MachineLegalizer::findLegalType(const InstrAspect &Aspect,
- LegalizeAction Action) const {
- switch(Action) {
- default:
- llvm_unreachable("Cannot find legal type");
- case Legal:
- case Lower:
- case Libcall:
- return Aspect.Type;
- case NarrowScalar: {
- return findLegalType(Aspect,
- [&](LLT Ty) -> LLT { return Ty.halfScalarSize(); });
- }
- case WidenScalar: {
- return findLegalType(Aspect, [&](LLT Ty) -> LLT {
- return Ty.getSizeInBits() < 8 ? LLT::scalar(8) : Ty.doubleScalarSize();
- });
- }
- case FewerElements: {
- return findLegalType(Aspect,
- [&](LLT Ty) -> LLT { return Ty.halfElements(); });
- }
- case MoreElements: {
- return findLegalType(Aspect,
- [&](LLT Ty) -> LLT { return Ty.doubleElements(); });
- }
- }
-}
Modified: llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/RegBankSelect.cpp Fri Oct 14 17:18:18 2016
@@ -12,7 +12,7 @@
#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
#include "llvm/ADT/PostOrderIterator.h"
-#include "llvm/CodeGen/GlobalISel/MachineLegalizer.h"
+#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
#include "llvm/CodeGen/GlobalISel/RegisterBank.h"
#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
@@ -571,9 +571,9 @@ bool RegBankSelect::runOnMachineFunction
// Check that our input is fully legal: we require the function to have the
// Legalized property, so it should be.
// FIXME: This should be in the MachineVerifier, but it can't use the
- // MachineLegalizer as it's currently in the separate GlobalISel library.
+ // LegalizerInfo as it's currently in the separate GlobalISel library.
const MachineRegisterInfo &MRI = MF.getRegInfo();
- if (const MachineLegalizer *MLI = MF.getSubtarget().getMachineLegalizer()) {
+ if (const LegalizerInfo *MLI = MF.getSubtarget().getLegalizerInfo()) {
for (const MachineBasicBlock &MBB : MF) {
for (const MachineInstr &MI : MBB) {
if (isPreISelGenericOpcode(MI.getOpcode()) && !MLI->isLegal(MI, MRI)) {
Copied: llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp (from r284281, llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp?p2=llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp&p1=llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp&r1=284281&r2=284287&rev=284287&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-//===- AArch64MachineLegalizer.cpp -------------------------------*- C++ -*-==//
+//===- AArch64LegalizerInfo.cpp ----------------------------------*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
@@ -12,7 +12,7 @@
/// \todo This should be generated by TableGen.
//===----------------------------------------------------------------------===//
-#include "AArch64MachineLegalizer.h"
+#include "AArch64LegalizerInfo.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/DerivedTypes.h"
@@ -24,7 +24,7 @@ using namespace llvm;
#error "You shouldn't build this"
#endif
-AArch64MachineLegalizer::AArch64MachineLegalizer() {
+AArch64LegalizerInfo::AArch64LegalizerInfo() {
using namespace TargetOpcode;
const LLT p0 = LLT::pointer(0, 64);
const LLT s1 = LLT::scalar(1);
Copied: llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.h (from r284281, llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.h)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.h?p2=llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.h&p1=llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.h&r1=284281&r2=284287&rev=284287&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.h (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.h Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-//===- AArch64Machinelegalizer --------------------------------*- C++ -*-==//
+//===- AArch64LegalizerInfo --------------------------------------*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
@@ -15,16 +15,16 @@
#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
#define LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
-#include "llvm/CodeGen/GlobalISel/MachineLegalizer.h"
+#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
namespace llvm {
class LLVMContext;
/// This class provides the information for the target register banks.
-class AArch64MachineLegalizer : public MachineLegalizer {
+class AArch64LegalizerInfo : public LegalizerInfo {
public:
- AArch64MachineLegalizer();
+ AArch64LegalizerInfo();
};
} // End llvm namespace.
#endif
Removed: llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp?rev=284286&view=auto
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.cpp (removed)
@@ -1,202 +0,0 @@
-//===- AArch64MachineLegalizer.cpp -------------------------------*- C++ -*-==//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-/// \file
-/// This file implements the targeting of the Machinelegalizer class for
-/// AArch64.
-/// \todo This should be generated by TableGen.
-//===----------------------------------------------------------------------===//
-
-#include "AArch64MachineLegalizer.h"
-#include "llvm/CodeGen/ValueTypes.h"
-#include "llvm/IR/Type.h"
-#include "llvm/IR/DerivedTypes.h"
-#include "llvm/Target/TargetOpcodes.h"
-
-using namespace llvm;
-
-#ifndef LLVM_BUILD_GLOBAL_ISEL
-#error "You shouldn't build this"
-#endif
-
-AArch64MachineLegalizer::AArch64MachineLegalizer() {
- using namespace TargetOpcode;
- const LLT p0 = LLT::pointer(0, 64);
- const LLT s1 = LLT::scalar(1);
- const LLT s8 = LLT::scalar(8);
- const LLT s16 = LLT::scalar(16);
- const LLT s32 = LLT::scalar(32);
- const LLT s64 = LLT::scalar(64);
- const LLT v2s32 = LLT::vector(2, 32);
- const LLT v4s32 = LLT::vector(4, 32);
- const LLT v2s64 = LLT::vector(2, 64);
-
- for (auto BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR, G_SHL}) {
- // These operations naturally get the right answer when used on
- // GPR32, even if the actual type is narrower.
- for (auto Ty : {s1, s8, s16, s32, s64, v2s32, v4s32, v2s64})
- setAction({BinOp, Ty}, Legal);
- }
-
- setAction({G_GEP, p0}, Legal);
- setAction({G_GEP, 1, s64}, Legal);
-
- for (auto Ty : {s1, s8, s16, s32})
- setAction({G_GEP, 1, Ty}, WidenScalar);
-
- for (auto BinOp : {G_LSHR, G_ASHR, G_SDIV, G_UDIV}) {
- for (auto Ty : {s32, s64})
- setAction({BinOp, Ty}, Legal);
-
- for (auto Ty : {s1, s8, s16})
- setAction({BinOp, Ty}, WidenScalar);
- }
-
- for (auto BinOp : { G_SREM, G_UREM })
- for (auto Ty : { s1, s8, s16, s32, s64 })
- setAction({BinOp, Ty}, Lower);
-
- for (auto Op : { G_UADDE, G_USUBE, G_SADDO, G_SSUBO, G_SMULO, G_UMULO }) {
- for (auto Ty : { s32, s64 })
- setAction({Op, Ty}, Legal);
-
- setAction({Op, 1, s1}, Legal);
- }
-
- for (auto BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
- for (auto Ty : {s32, s64})
- setAction({BinOp, Ty}, Legal);
-
- setAction({G_FREM, s32}, Libcall);
- setAction({G_FREM, s64}, Libcall);
-
- for (auto MemOp : {G_LOAD, G_STORE}) {
- for (auto Ty : {s8, s16, s32, s64, p0, v2s32})
- setAction({MemOp, Ty}, Legal);
-
- setAction({MemOp, s1}, WidenScalar);
-
- // And everything's fine in addrspace 0.
- setAction({MemOp, 1, p0}, Legal);
- }
-
- // Constants
- for (auto Ty : {s32, s64}) {
- setAction({TargetOpcode::G_CONSTANT, Ty}, Legal);
- setAction({TargetOpcode::G_FCONSTANT, Ty}, Legal);
- }
-
- setAction({G_CONSTANT, p0}, Legal);
-
- for (auto Ty : {s1, s8, s16})
- setAction({TargetOpcode::G_CONSTANT, Ty}, WidenScalar);
-
- setAction({TargetOpcode::G_FCONSTANT, s16}, WidenScalar);
-
- setAction({G_ICMP, s1}, Legal);
- setAction({G_ICMP, 1, s32}, Legal);
- setAction({G_ICMP, 1, s64}, Legal);
- setAction({G_ICMP, 1, p0}, Legal);
-
- for (auto Ty : {s1, s8, s16}) {
- setAction({G_ICMP, 1, Ty}, WidenScalar);
- }
-
- setAction({G_FCMP, s1}, Legal);
- setAction({G_FCMP, 1, s32}, Legal);
- setAction({G_FCMP, 1, s64}, Legal);
-
- // Extensions
- for (auto Ty : { s1, s8, s16, s32, s64 }) {
- setAction({G_ZEXT, Ty}, Legal);
- setAction({G_SEXT, Ty}, Legal);
- setAction({G_ANYEXT, Ty}, Legal);
- }
-
- for (auto Ty : { s1, s8, s16, s32 }) {
- setAction({G_ZEXT, 1, Ty}, Legal);
- setAction({G_SEXT, 1, Ty}, Legal);
- setAction({G_ANYEXT, 1, Ty}, Legal);
- }
-
- setAction({G_FPEXT, s64}, Legal);
- setAction({G_FPEXT, 1, s32}, Legal);
-
- // Truncations
- for (auto Ty : { s16, s32 })
- setAction({G_FPTRUNC, Ty}, Legal);
-
- for (auto Ty : { s32, s64 })
- setAction({G_FPTRUNC, 1, Ty}, Legal);
-
- for (auto Ty : { s1, s8, s16, s32 })
- setAction({G_TRUNC, Ty}, Legal);
-
- for (auto Ty : { s8, s16, s32, s64 })
- setAction({G_TRUNC, 1, Ty}, Legal);
-
- // Conversions
- for (auto Ty : { s1, s8, s16, s32, s64 }) {
- setAction({G_FPTOSI, 0, Ty}, Legal);
- setAction({G_FPTOUI, 0, Ty}, Legal);
- setAction({G_SITOFP, 1, Ty}, Legal);
- setAction({G_UITOFP, 1, Ty}, Legal);
- }
-
- for (auto Ty : { s32, s64 }) {
- setAction({G_FPTOSI, 1, Ty}, Legal);
- setAction({G_FPTOUI, 1, Ty}, Legal);
- setAction({G_SITOFP, 0, Ty}, Legal);
- setAction({G_UITOFP, 0, Ty}, Legal);
- }
-
- // Control-flow
- for (auto Ty : {s1, s8, s16, s32})
- setAction({G_BRCOND, Ty}, Legal);
-
- // Select
- for (auto Ty : {s1, s8, s16, s32, s64})
- setAction({G_SELECT, Ty}, Legal);
-
- setAction({G_SELECT, 1, s1}, Legal);
-
- // Pointer-handling
- setAction({G_FRAME_INDEX, p0}, Legal);
- setAction({G_GLOBAL_VALUE, p0}, Legal);
-
- setAction({G_PTRTOINT, 0, s64}, Legal);
- setAction({G_PTRTOINT, 1, p0}, Legal);
-
- setAction({G_INTTOPTR, 0, p0}, Legal);
- setAction({G_INTTOPTR, 1, s64}, Legal);
-
- // Casts for 32 and 64-bit width type are just copies.
- for (auto Ty : {s1, s8, s16, s32, s64}) {
- setAction({G_BITCAST, 0, Ty}, Legal);
- setAction({G_BITCAST, 1, Ty}, Legal);
- }
-
- // For the sake of copying bits around, the type does not really
- // matter as long as it fits a register.
- for (int EltSize = 8; EltSize <= 64; EltSize *= 2) {
- setAction({G_BITCAST, 0, LLT::vector(128/EltSize, EltSize)}, Legal);
- setAction({G_BITCAST, 1, LLT::vector(128/EltSize, EltSize)}, Legal);
- if (EltSize >= 64)
- continue;
-
- setAction({G_BITCAST, 0, LLT::vector(64/EltSize, EltSize)}, Legal);
- setAction({G_BITCAST, 1, LLT::vector(64/EltSize, EltSize)}, Legal);
- if (EltSize >= 32)
- continue;
-
- setAction({G_BITCAST, 0, LLT::vector(32/EltSize, EltSize)}, Legal);
- setAction({G_BITCAST, 1, LLT::vector(32/EltSize, EltSize)}, Legal);
- }
-
- computeTables();
-}
Removed: llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.h?rev=284286&view=auto
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.h (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64MachineLegalizer.h (removed)
@@ -1,30 +0,0 @@
-//===- AArch64Machinelegalizer --------------------------------*- C++ -*-==//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-/// \file
-/// This file declares the targeting of the Machinelegalizer class for
-/// AArch64.
-/// \todo This should be generated by TableGen.
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
-#define LLVM_LIB_TARGET_AARCH64_AARCH64MACHINELEGALIZER_H
-
-#include "llvm/CodeGen/GlobalISel/MachineLegalizer.h"
-
-namespace llvm {
-
-class LLVMContext;
-
-/// This class provides the information for the target register banks.
-class AArch64MachineLegalizer : public MachineLegalizer {
-public:
- AArch64MachineLegalizer();
-};
-} // End llvm namespace.
-#endif
Modified: llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64Subtarget.cpp Fri Oct 14 17:18:18 2016
@@ -105,9 +105,9 @@ const InstructionSelector *AArch64Subtar
return GISel->getInstructionSelector();
}
-const MachineLegalizer *AArch64Subtarget::getMachineLegalizer() const {
+const LegalizerInfo *AArch64Subtarget::getLegalizerInfo() const {
assert(GISel && "Access to GlobalISel APIs not set");
- return GISel->getMachineLegalizer();
+ return GISel->getLegalizerInfo();
}
const RegisterBankInfo *AArch64Subtarget::getRegBankInfo() const {
Modified: llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64Subtarget.h Fri Oct 14 17:18:18 2016
@@ -147,7 +147,7 @@ public:
}
const CallLowering *getCallLowering() const override;
const InstructionSelector *getInstructionSelector() const override;
- const MachineLegalizer *getMachineLegalizer() const override;
+ const LegalizerInfo *getLegalizerInfo() const override;
const RegisterBankInfo *getRegBankInfo() const override;
const Triple &getTargetTriple() const { return TargetTriple; }
bool enableMachineScheduler() const override { return true; }
Modified: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp Fri Oct 14 17:18:18 2016
@@ -13,14 +13,14 @@
#include "AArch64.h"
#include "AArch64CallLowering.h"
#include "AArch64InstructionSelector.h"
-#include "AArch64MachineLegalizer.h"
+#include "AArch64LegalizerInfo.h"
#include "AArch64RegisterBankInfo.h"
#include "AArch64TargetMachine.h"
#include "AArch64TargetObjectFile.h"
#include "AArch64TargetTransformInfo.h"
#include "llvm/CodeGen/GlobalISel/IRTranslator.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
-#include "llvm/CodeGen/GlobalISel/MachineLegalizePass.h"
+#include "llvm/CodeGen/GlobalISel/Legalizer.h"
#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
@@ -202,7 +202,7 @@ namespace {
struct AArch64GISelActualAccessor : public GISelAccessor {
std::unique_ptr<CallLowering> CallLoweringInfo;
std::unique_ptr<InstructionSelector> InstSelector;
- std::unique_ptr<MachineLegalizer> Legalizer;
+ std::unique_ptr<LegalizerInfo> Legalizer;
std::unique_ptr<RegisterBankInfo> RegBankInfo;
const CallLowering *getCallLowering() const override {
return CallLoweringInfo.get();
@@ -210,7 +210,7 @@ struct AArch64GISelActualAccessor : publ
const InstructionSelector *getInstructionSelector() const override {
return InstSelector.get();
}
- const class MachineLegalizer *getMachineLegalizer() const override {
+ const class LegalizerInfo *getLegalizerInfo() const override {
return Legalizer.get();
}
const RegisterBankInfo *getRegBankInfo() const override {
@@ -247,7 +247,7 @@ AArch64TargetMachine::getSubtargetImpl(c
new AArch64GISelActualAccessor();
GISel->CallLoweringInfo.reset(
new AArch64CallLowering(*I->getTargetLowering()));
- GISel->Legalizer.reset(new AArch64MachineLegalizer());
+ GISel->Legalizer.reset(new AArch64LegalizerInfo());
auto *RBI = new AArch64RegisterBankInfo(*I->getRegisterInfo());
@@ -399,7 +399,7 @@ bool AArch64PassConfig::addIRTranslator(
return false;
}
bool AArch64PassConfig::addLegalizeMachineIR() {
- addPass(new MachineLegalizePass());
+ addPass(new Legalizer());
return false;
}
bool AArch64PassConfig::addRegBankSelect() {
Modified: llvm/trunk/lib/Target/AArch64/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/CMakeLists.txt?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/AArch64/CMakeLists.txt Fri Oct 14 17:18:18 2016
@@ -20,7 +20,7 @@ add_public_tablegen_target(AArch64Common
set(GLOBAL_ISEL_FILES
AArch64CallLowering.cpp
AArch64InstructionSelector.cpp
- AArch64MachineLegalizer.cpp
+ AArch64LegalizerInfo.cpp
AArch64RegisterBankInfo.cpp
)
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-add.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-and.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-and.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-and.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-div.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-div.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-div.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-gep.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-gep.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-gep.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-gep.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ignore-non-generic.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ignore-non-generic.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ignore-non-generic.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-ignore-non-generic.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-or.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-or.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-or.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-property.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-property.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-property.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-property.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir Fri Oct 14 17:18:18 2016
@@ -1,4 +1,4 @@
-# RUN: llc -O0 -run-pass=legalize-mir -global-isel %s -o - 2>&1 | FileCheck %s
+# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-AnInfiniteLoopInDAGCombine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-AnInfiniteLoopInDAGCombine.ll?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-AnInfiniteLoopInDAGCombine.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-AnInfiniteLoopInDAGCombine.ll Fri Oct 14 17:18:18 2016
@@ -20,4 +20,4 @@ entry:
%sext = shl <4 x i32> %mul.i, <i32 16, i32 16, i32 16, i32 16>
%vmovl.i.i = ashr <4 x i32> %sext, <i32 16, i32 16, i32 16, i32 16>
ret <4 x i32> %vmovl.i.i
-}
\ No newline at end of file
+}
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fp-contract-zero.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fp-contract-zero.ll?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-fp-contract-zero.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-fp-contract-zero.ll Fri Oct 14 17:18:18 2016
@@ -11,4 +11,4 @@ define double @test_fms_fold(double %a,
%mul1 = fmul double %b, 0.000000e+00
%sub = fsub double %mul, %mul1
ret double %sub
-}
\ No newline at end of file
+}
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-subsections.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-subsections.ll?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-subsections.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-subsections.ll Fri Oct 14 17:18:18 2016
@@ -2,4 +2,4 @@
; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s --check-prefix=CHECK-ELF
; CHECK-MACHO: .subsections_via_symbols
-; CHECK-ELF-NOT: .subsections_via_symbols
\ No newline at end of file
+; CHECK-ELF-NOT: .subsections_via_symbols
Modified: llvm/trunk/test/CodeGen/AArch64/branch-relax-alignment.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/branch-relax-alignment.ll?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/branch-relax-alignment.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/branch-relax-alignment.ll Fri Oct 14 17:18:18 2016
@@ -26,4 +26,4 @@ bb1:
ret i32 0
}
-attributes #0 = { nounwind }
\ No newline at end of file
+attributes #0 = { nounwind }
Modified: llvm/trunk/test/CodeGen/AArch64/simple-macho.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/simple-macho.ll?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/simple-macho.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/simple-macho.ll Fri Oct 14 17:18:18 2016
@@ -9,4 +9,4 @@ define void @foo() {
; CHECK-OBJ: 0: c0 03 5f d6 ret
ret void
-}
\ No newline at end of file
+}
Modified: llvm/trunk/unittests/CodeGen/GlobalISel/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/CodeGen/GlobalISel/CMakeLists.txt?rev=284287&r1=284286&r2=284287&view=diff
==============================================================================
--- llvm/trunk/unittests/CodeGen/GlobalISel/CMakeLists.txt (original)
+++ llvm/trunk/unittests/CodeGen/GlobalISel/CMakeLists.txt Fri Oct 14 17:18:18 2016
@@ -5,6 +5,6 @@ set(LLVM_LINK_COMPONENTS
if(LLVM_BUILD_GLOBAL_ISEL)
add_llvm_unittest(GlobalISelTests
- MachineLegalizerTest.cpp
+ LegalizerInfoTest.cpp
)
endif()
Added: llvm/trunk/unittests/CodeGen/GlobalISel/LegalizerInfoTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/CodeGen/GlobalISel/LegalizerInfoTest.cpp?rev=284287&view=auto
==============================================================================
--- llvm/trunk/unittests/CodeGen/GlobalISel/LegalizerInfoTest.cpp (added)
+++ llvm/trunk/unittests/CodeGen/GlobalISel/LegalizerInfoTest.cpp Fri Oct 14 17:18:18 2016
@@ -0,0 +1,120 @@
+//===- llvm/unittest/CodeGen/GlobalISel/LegalizerInfoTest.cpp -------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
+#include "llvm/Target/TargetOpcodes.h"
+#include "gtest/gtest.h"
+
+using namespace llvm;
+
+// Define a couple of pretty printers to help debugging when things go wrong.
+namespace llvm {
+std::ostream &
+operator<<(std::ostream &OS, const llvm::LegalizerInfo::LegalizeAction Act) {
+ switch (Act) {
+ case LegalizerInfo::Lower: OS << "Lower"; break;
+ case LegalizerInfo::Legal: OS << "Legal"; break;
+ case LegalizerInfo::NarrowScalar: OS << "NarrowScalar"; break;
+ case LegalizerInfo::WidenScalar: OS << "WidenScalar"; break;
+ case LegalizerInfo::FewerElements: OS << "FewerElements"; break;
+ case LegalizerInfo::MoreElements: OS << "MoreElements"; break;
+ case LegalizerInfo::Libcall: OS << "Libcall"; break;
+ case LegalizerInfo::Custom: OS << "Custom"; break;
+ case LegalizerInfo::Unsupported: OS << "Unsupported"; break;
+ case LegalizerInfo::NotFound: OS << "NotFound";
+ }
+ return OS;
+}
+
+std::ostream &
+operator<<(std::ostream &OS, const llvm::LLT Ty) {
+ std::string Repr;
+ raw_string_ostream SS{Repr};
+ Ty.print(SS);
+ OS << SS.str();
+ return OS;
+}
+}
+
+namespace {
+
+
+TEST(LegalizerInfoTest, ScalarRISC) {
+ using namespace TargetOpcode;
+ LegalizerInfo L;
+ // Typical RISCy set of operations based on AArch64.
+ L.setAction({G_ADD, LLT::scalar(8)}, LegalizerInfo::WidenScalar);
+ L.setAction({G_ADD, LLT::scalar(16)}, LegalizerInfo::WidenScalar);
+ L.setAction({G_ADD, LLT::scalar(32)}, LegalizerInfo::Legal);
+ L.setAction({G_ADD, LLT::scalar(64)}, LegalizerInfo::Legal);
+ L.computeTables();
+
+ // Check we infer the correct types and actually do what we're told.
+ ASSERT_EQ(L.getAction({G_ADD, LLT::scalar(8)}),
+ std::make_pair(LegalizerInfo::WidenScalar, LLT::scalar(32)));
+ ASSERT_EQ(L.getAction({G_ADD, LLT::scalar(16)}),
+ std::make_pair(LegalizerInfo::WidenScalar, LLT::scalar(32)));
+ ASSERT_EQ(L.getAction({G_ADD, LLT::scalar(32)}),
+ std::make_pair(LegalizerInfo::Legal, LLT::scalar(32)));
+ ASSERT_EQ(L.getAction({G_ADD, LLT::scalar(64)}),
+ std::make_pair(LegalizerInfo::Legal, LLT::scalar(64)));
+
+ // Make sure the default for over-sized types applies.
+ ASSERT_EQ(L.getAction({G_ADD, LLT::scalar(128)}),
+ std::make_pair(LegalizerInfo::NarrowScalar, LLT::scalar(64)));
+}
+
+TEST(LegalizerInfoTest, VectorRISC) {
+ using namespace TargetOpcode;
+ LegalizerInfo L;
+ // Typical RISCy set of operations based on ARM.
+ L.setScalarInVectorAction(G_ADD, LLT::scalar(8), LegalizerInfo::Legal);
+ L.setScalarInVectorAction(G_ADD, LLT::scalar(16), LegalizerInfo::Legal);
+ L.setScalarInVectorAction(G_ADD, LLT::scalar(32), LegalizerInfo::Legal);
+
+ L.setAction({G_ADD, LLT::vector(8, 8)}, LegalizerInfo::Legal);
+ L.setAction({G_ADD, LLT::vector(16, 8)}, LegalizerInfo::Legal);
+ L.setAction({G_ADD, LLT::vector(4, 16)}, LegalizerInfo::Legal);
+ L.setAction({G_ADD, LLT::vector(8, 16)}, LegalizerInfo::Legal);
+ L.setAction({G_ADD, LLT::vector(2, 32)}, LegalizerInfo::Legal);
+ L.setAction({G_ADD, LLT::vector(4, 32)}, LegalizerInfo::Legal);
+ L.computeTables();
+
+ // Check we infer the correct types and actually do what we're told for some
+ // simple cases.
+ ASSERT_EQ(L.getAction({G_ADD, LLT::vector(2, 8)}),
+ std::make_pair(LegalizerInfo::MoreElements, LLT::vector(8, 8)));
+ ASSERT_EQ(L.getAction({G_ADD, LLT::vector(8, 8)}),
+ std::make_pair(LegalizerInfo::Legal, LLT::vector(8, 8)));
+ ASSERT_EQ(
+ L.getAction({G_ADD, LLT::vector(8, 32)}),
+ std::make_pair(LegalizerInfo::FewerElements, LLT::vector(4, 32)));
+}
+
+TEST(LegalizerInfoTest, MultipleTypes) {
+ using namespace TargetOpcode;
+ LegalizerInfo L;
+ LLT p0 = LLT::pointer(0, 64);
+ LLT s32 = LLT::scalar(32);
+ LLT s64 = LLT::scalar(64);
+
+ // Typical RISCy set of operations based on AArch64.
+ L.setAction({G_PTRTOINT, 0, s64}, LegalizerInfo::Legal);
+ L.setAction({G_PTRTOINT, 1, p0}, LegalizerInfo::Legal);
+
+ L.setAction({G_PTRTOINT, 0, s32}, LegalizerInfo::WidenScalar);
+ L.computeTables();
+
+ // Check we infer the correct types and actually do what we're told.
+ ASSERT_EQ(L.getAction({G_PTRTOINT, 0, s64}),
+ std::make_pair(LegalizerInfo::Legal, s64));
+ ASSERT_EQ(L.getAction({G_PTRTOINT, 1, p0}),
+ std::make_pair(LegalizerInfo::Legal, p0));
+}
+}
Removed: llvm/trunk/unittests/CodeGen/GlobalISel/MachineLegalizerTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/CodeGen/GlobalISel/MachineLegalizerTest.cpp?rev=284286&view=auto
==============================================================================
--- llvm/trunk/unittests/CodeGen/GlobalISel/MachineLegalizerTest.cpp (original)
+++ llvm/trunk/unittests/CodeGen/GlobalISel/MachineLegalizerTest.cpp (removed)
@@ -1,120 +0,0 @@
-//===- llvm/unittest/CodeGen/GlobalISel/MachineLegalizerTest.cpp ----------===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/CodeGen/GlobalISel/MachineLegalizer.h"
-#include "llvm/Target/TargetOpcodes.h"
-#include "gtest/gtest.h"
-
-using namespace llvm;
-
-// Define a couple of pretty printers to help debugging when things go wrong.
-namespace llvm {
-std::ostream &
-operator<<(std::ostream &OS, const llvm::MachineLegalizer::LegalizeAction Act) {
- switch (Act) {
- case MachineLegalizer::Lower: OS << "Lower"; break;
- case MachineLegalizer::Legal: OS << "Legal"; break;
- case MachineLegalizer::NarrowScalar: OS << "NarrowScalar"; break;
- case MachineLegalizer::WidenScalar: OS << "WidenScalar"; break;
- case MachineLegalizer::FewerElements: OS << "FewerElements"; break;
- case MachineLegalizer::MoreElements: OS << "MoreElements"; break;
- case MachineLegalizer::Libcall: OS << "Libcall"; break;
- case MachineLegalizer::Custom: OS << "Custom"; break;
- case MachineLegalizer::Unsupported: OS << "Unsupported"; break;
- case MachineLegalizer::NotFound: OS << "NotFound";
- }
- return OS;
-}
-
-std::ostream &
-operator<<(std::ostream &OS, const llvm::LLT Ty) {
- std::string Repr;
- raw_string_ostream SS{Repr};
- Ty.print(SS);
- OS << SS.str();
- return OS;
-}
-}
-
-namespace {
-
-
-TEST(MachineLegalizerTest, ScalarRISC) {
- using namespace TargetOpcode;
- MachineLegalizer L;
- // Typical RISCy set of operations based on AArch64.
- L.setAction({G_ADD, LLT::scalar(8)}, MachineLegalizer::WidenScalar);
- L.setAction({G_ADD, LLT::scalar(16)}, MachineLegalizer::WidenScalar);
- L.setAction({G_ADD, LLT::scalar(32)}, MachineLegalizer::Legal);
- L.setAction({G_ADD, LLT::scalar(64)}, MachineLegalizer::Legal);
- L.computeTables();
-
- // Check we infer the correct types and actually do what we're told.
- ASSERT_EQ(L.getAction({G_ADD, LLT::scalar(8)}),
- std::make_pair(MachineLegalizer::WidenScalar, LLT::scalar(32)));
- ASSERT_EQ(L.getAction({G_ADD, LLT::scalar(16)}),
- std::make_pair(MachineLegalizer::WidenScalar, LLT::scalar(32)));
- ASSERT_EQ(L.getAction({G_ADD, LLT::scalar(32)}),
- std::make_pair(MachineLegalizer::Legal, LLT::scalar(32)));
- ASSERT_EQ(L.getAction({G_ADD, LLT::scalar(64)}),
- std::make_pair(MachineLegalizer::Legal, LLT::scalar(64)));
-
- // Make sure the default for over-sized types applies.
- ASSERT_EQ(L.getAction({G_ADD, LLT::scalar(128)}),
- std::make_pair(MachineLegalizer::NarrowScalar, LLT::scalar(64)));
-}
-
-TEST(MachineLegalizerTest, VectorRISC) {
- using namespace TargetOpcode;
- MachineLegalizer L;
- // Typical RISCy set of operations based on ARM.
- L.setScalarInVectorAction(G_ADD, LLT::scalar(8), MachineLegalizer::Legal);
- L.setScalarInVectorAction(G_ADD, LLT::scalar(16), MachineLegalizer::Legal);
- L.setScalarInVectorAction(G_ADD, LLT::scalar(32), MachineLegalizer::Legal);
-
- L.setAction({G_ADD, LLT::vector(8, 8)}, MachineLegalizer::Legal);
- L.setAction({G_ADD, LLT::vector(16, 8)}, MachineLegalizer::Legal);
- L.setAction({G_ADD, LLT::vector(4, 16)}, MachineLegalizer::Legal);
- L.setAction({G_ADD, LLT::vector(8, 16)}, MachineLegalizer::Legal);
- L.setAction({G_ADD, LLT::vector(2, 32)}, MachineLegalizer::Legal);
- L.setAction({G_ADD, LLT::vector(4, 32)}, MachineLegalizer::Legal);
- L.computeTables();
-
- // Check we infer the correct types and actually do what we're told for some
- // simple cases.
- ASSERT_EQ(L.getAction({G_ADD, LLT::vector(2, 8)}),
- std::make_pair(MachineLegalizer::MoreElements, LLT::vector(8, 8)));
- ASSERT_EQ(L.getAction({G_ADD, LLT::vector(8, 8)}),
- std::make_pair(MachineLegalizer::Legal, LLT::vector(8, 8)));
- ASSERT_EQ(
- L.getAction({G_ADD, LLT::vector(8, 32)}),
- std::make_pair(MachineLegalizer::FewerElements, LLT::vector(4, 32)));
-}
-
-TEST(MachineLegalizerTest, MultipleTypes) {
- using namespace TargetOpcode;
- MachineLegalizer L;
- LLT p0 = LLT::pointer(0, 64);
- LLT s32 = LLT::scalar(32);
- LLT s64 = LLT::scalar(64);
-
- // Typical RISCy set of operations based on AArch64.
- L.setAction({G_PTRTOINT, 0, s64}, MachineLegalizer::Legal);
- L.setAction({G_PTRTOINT, 1, p0}, MachineLegalizer::Legal);
-
- L.setAction({G_PTRTOINT, 0, s32}, MachineLegalizer::WidenScalar);
- L.computeTables();
-
- // Check we infer the correct types and actually do what we're told.
- ASSERT_EQ(L.getAction({G_PTRTOINT, 0, s64}),
- std::make_pair(MachineLegalizer::Legal, s64));
- ASSERT_EQ(L.getAction({G_PTRTOINT, 1, p0}),
- std::make_pair(MachineLegalizer::Legal, p0));
-}
-}
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