[PATCH] D25548: [AMDGPU] Add 32-bit lo/hi got and pc relative variant kinds and emit appropriate relocations
Konstantin Zhuravlyov via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 13 21:30:47 PDT 2016
This revision was automatically updated to reflect the committed changes.
Closed by commit rL284195: [AMDGPU] Add 32-bit lo/hi got and pc relative variant kinds and emit… (authored by kzhuravl).
Changed prior to commit:
https://reviews.llvm.org/D25548?vs=74475&id=74613#toc
Repository:
rL LLVM
https://reviews.llvm.org/D25548
Files:
llvm/trunk/include/llvm/MC/MCExpr.h
llvm/trunk/lib/MC/MCExpr.cpp
llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
llvm/trunk/test/MC/AMDGPU/reloc.s
Index: llvm/trunk/include/llvm/MC/MCExpr.h
===================================================================
--- llvm/trunk/include/llvm/MC/MCExpr.h
+++ llvm/trunk/include/llvm/MC/MCExpr.h
@@ -266,6 +266,11 @@
VK_WebAssembly_FUNCTION, // Function table index, rather than virtual addr
+ VK_AMDGPU_GOTPCREL32_LO, // symbol at gotpcrel32@lo
+ VK_AMDGPU_GOTPCREL32_HI, // symbol at gotpcrel32@hi
+ VK_AMDGPU_REL32_LO, // symbol at rel32@lo
+ VK_AMDGPU_REL32_HI, // symbol at rel32@hi
+
VK_TPREL,
VK_DTPREL
};
Index: llvm/trunk/test/MC/AMDGPU/reloc.s
===================================================================
--- llvm/trunk/test/MC/AMDGPU/reloc.s
+++ llvm/trunk/test/MC/AMDGPU/reloc.s
@@ -4,7 +4,11 @@
// CHECK: .rel.text {
// CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0
// CHECK: R_AMDGPU_ABS32_HI SCRATCH_RSRC_DWORD1 0x0
-// CHECK: R_AMDGPU_GOTPCREL global_var 0x0
+// CHECK: R_AMDGPU_GOTPCREL global_var0 0x0
+// CHECK: R_AMDGPU_GOTPCREL32_LO global_var1 0x0
+// CHECK: R_AMDGPU_GOTPCREL32_HI global_var2 0x0
+// CHECK: R_AMDGPU_REL32_LO global_var3 0x0
+// CHECK: R_AMDGPU_REL32_HI global_var4 0x0
// CHECK: R_AMDGPU_ABS32 var 0x0
// CHECK: }
// CHECK: .rel.data {
@@ -15,9 +19,17 @@
kernel:
s_mov_b32 s0, SCRATCH_RSRC_DWORD0
s_mov_b32 s1, SCRATCH_RSRC_DWORD1
- s_mov_b32 s2, global_var at GOTPCREL
-
-.globl global_var
+ s_mov_b32 s2, global_var0 at GOTPCREL
+ s_mov_b32 s3, global_var1 at gotpcrel32@lo
+ s_mov_b32 s4, global_var2 at gotpcrel32@hi
+ s_mov_b32 s5, global_var3 at rel32@lo
+ s_mov_b32 s6, global_var4 at rel32@hi
+
+.globl global_var0
+.globl global_var1
+.globl global_var2
+.globl global_var3
+.globl global_var4
.globl SCRATCH_RSRC_DWORD0
Index: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
+++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
@@ -53,6 +53,14 @@
break;
case MCSymbolRefExpr::VK_GOTPCREL:
return ELF::R_AMDGPU_GOTPCREL;
+ case MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_LO:
+ return ELF::R_AMDGPU_GOTPCREL32_LO;
+ case MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_HI:
+ return ELF::R_AMDGPU_GOTPCREL32_HI;
+ case MCSymbolRefExpr::VK_AMDGPU_REL32_LO:
+ return ELF::R_AMDGPU_REL32_LO;
+ case MCSymbolRefExpr::VK_AMDGPU_REL32_HI:
+ return ELF::R_AMDGPU_REL32_HI;
}
switch (Fixup.getKind()) {
Index: llvm/trunk/lib/MC/MCExpr.cpp
===================================================================
--- llvm/trunk/lib/MC/MCExpr.cpp
+++ llvm/trunk/lib/MC/MCExpr.cpp
@@ -275,6 +275,10 @@
case VK_Hexagon_IE: return "IE";
case VK_Hexagon_IE_GOT: return "IEGOT";
case VK_WebAssembly_FUNCTION: return "FUNCTION";
+ case VK_AMDGPU_GOTPCREL32_LO: return "gotpcrel32 at lo";
+ case VK_AMDGPU_GOTPCREL32_HI: return "gotpcrel32 at hi";
+ case VK_AMDGPU_REL32_LO: return "rel32 at lo";
+ case VK_AMDGPU_REL32_HI: return "rel32 at hi";
}
llvm_unreachable("Invalid variant kind");
}
@@ -372,6 +376,10 @@
.Case("prel31", VK_ARM_PREL31)
.Case("sbrel", VK_ARM_SBREL)
.Case("tlsldo", VK_ARM_TLSLDO)
+ .Case("gotpcrel32 at lo", VK_AMDGPU_GOTPCREL32_LO)
+ .Case("gotpcrel32 at hi", VK_AMDGPU_GOTPCREL32_HI)
+ .Case("rel32 at lo", VK_AMDGPU_REL32_LO)
+ .Case("rel32 at hi", VK_AMDGPU_REL32_HI)
.Default(VK_Invalid);
}
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