[PATCH] D25181: AMDGPU: Add definitions for scalar store instructions

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 13 03:01:07 PDT 2016


arsenm updated this revision to Diff 74483.

https://reviews.llvm.org/D25181

Files:
  lib/Target/AMDGPU/AMDGPU.td
  lib/Target/AMDGPU/AMDGPUSubtarget.h
  lib/Target/AMDGPU/SIDefines.h
  lib/Target/AMDGPU/SIInstrFormats.td
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SIInstrInfo.h
  lib/Target/AMDGPU/SMInstructions.td
  test/CodeGen/AMDGPU/coalescer-subreg-join.mir
  test/CodeGen/MIR/AMDGPU/target-index-operands.mir
  test/MC/AMDGPU/smem.s
  test/MC/AMDGPU/smrd-err.s

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D25181.74483.patch
Type: text/x-patch
Size: 18698 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20161013/99d42a90/attachment.bin>


More information about the llvm-commits mailing list