[PATCH] D25481: CodeGen: Introduce a base class for immediates.

[Peter Collingbourne via llvm-commits]

pcc created this revision.
pcc added a reviewer: chandlerc.
pcc added subscribers: llvm-commits, lattner.
pcc added a dependency: D25355: Target: Replace most PatLeaf patterns that match immediates with ImmLeaf patterns. NFCI..
Herald added subscribers: nhaehnle, nemanjai, jyknight, arsenm, jfb, MatzeB, jholewinski.
Herald added a reviewer: tstellarAMD.

Move the body of ConstantSDNode to a new class, ConstantIntSDNode,
which derives from ConstantSDNode, which now acts as the base class for
immediates. Change most references to ConstantSDNode in C++ code to refer
to ConstantIntSDNode.

In tblgen, "imm" continues to refer to ConstantSDNode. Change pattern and
transform code so that it casts to ConstantIntSDNode.

This is in preparation for a future change which will introduce a separate
class derived from ConstantSDNode for references to symbols with fixed
addresses.

As proposed on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2016-October/105800.html

Depends on https://reviews.llvm.org/D25355


https://reviews.llvm.org/D25481

Files:
  llvm/include/llvm/CodeGen/ISDOpcodes.h
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/include/llvm/CodeGen/SelectionDAGISel.h
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/include/llvm/Target/TargetLowering.h
  llvm/include/llvm/Target/TargetSelectionDAG.td
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
  llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.h
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.td
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMInstrInfo.td
  llvm/lib/Target/ARM/ARMInstrNEON.td
  llvm/lib/Target/ARM/ARMInstrThumb.td
  llvm/lib/Target/ARM/ARMInstrThumb2.td
  llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
  llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp
  llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
  llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
  llvm/lib/Target/Hexagon/HexagonInstrInfo.td
  llvm/lib/Target/Hexagon/HexagonInstrInfoV4.td
  llvm/lib/Target/Hexagon/HexagonIntrinsics.td
  llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp
  llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp
  llvm/lib/Target/Lanai/LanaiISelLowering.cpp
  llvm/lib/Target/Lanai/LanaiInstrInfo.td
  llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp
  llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
  llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
  llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
  llvm/lib/Target/Mips/Mips64InstrInfo.td
  llvm/lib/Target/Mips/MipsISelLowering.cpp
  llvm/lib/Target/Mips/MipsInstrInfo.td
  llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
  llvm/lib/Target/Mips/MipsSEISelLowering.cpp
  llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
  llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
  llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
  llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCInstr64Bit.td
  llvm/lib/Target/PowerPC/PPCInstrHTM.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCInstrQPX.td
  llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
  llvm/lib/Target/Sparc/SparcISelLowering.cpp
  llvm/lib/Target/Sparc/SparcInstr64Bit.td
  llvm/lib/Target/Sparc/SparcInstrInfo.td
  llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
  llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
  llvm/lib/Target/SystemZ/SystemZOperands.td
  llvm/lib/Target/SystemZ/SystemZOperators.td
  llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
  llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
  llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86InstrCompiler.td
  llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
  llvm/lib/Target/X86/X86InstrInfo.cpp
  llvm/lib/Target/X86/X86InstrInfo.td
  llvm/lib/Target/X86/X86InstrShiftRotate.td
  llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
  llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
  llvm/lib/Target/XCore/XCoreISelLowering.cpp
  llvm/lib/Target/XCore/XCoreInstrInfo.td
  llvm/utils/TableGen/CodeGenDAGPatterns.cpp
  llvm/utils/TableGen/CodeGenDAGPatterns.h
  llvm/utils/TableGen/DAGISelMatcher.h
  llvm/utils/TableGen/DAGISelMatcherEmitter.cpp

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D25481.74277.patch
Type: text/x-patch
Size: 527206 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20161011/ec7421db/attachment-0001.bin>