[llvm] r283691 - MC: Remove unused entities.
Peter Collingbourne via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 10 14:33:52 PDT 2016
You can always use getFlags() and check the flag bit yourself.
A nice cleanup may be to replace all of the remaining functions with a
single hasFlag() function that takes an MCID::Flag.
Peter
On Mon, Oct 10, 2016 at 2:20 PM, Aditya Nandakumar <
aditya_nandakumar at apple.com> wrote:
> Hi Peter
>
> I see that you’ve deleted some methods such as isMoveImmediate() or
> isBitcast() from MCinstrDesc.
> If out of tree code would need to check for the above conditions, there is
> no way of doing that if we delete the above.
> For completeness sake, shouldn’t all of the methods which check the values
> of Flag bitfields be present as there is no other way of accessing them?
>
> Thanks
> Aditya
> > On Oct 8, 2016, at 9:39 PM, Peter Collingbourne via llvm-commits <
> llvm-commits at lists.llvm.org> wrote:
> >
> > Author: pcc
> > Date: Sat Oct 8 23:39:13 2016
> > New Revision: 283691
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=283691&view=rev
> > Log:
> > MC: Remove unused entities.
> >
> > Removed:
> > llvm/trunk/lib/MC/MCWinEH.cpp
> > Modified:
> > llvm/trunk/include/llvm/MC/MCInstrDesc.h
> > llvm/trunk/include/llvm/MC/MCMachObjectWriter.h
> > llvm/trunk/include/llvm/MC/MCParser/MCParsedAsmOperand.h
> > llvm/trunk/include/llvm/MC/MCParser/MCTargetAsmParser.h
> > llvm/trunk/include/llvm/MC/MCStreamer.h
> > llvm/trunk/include/llvm/MC/MCWin64EH.h
> > llvm/trunk/include/llvm/MC/MCWinEH.h
> > llvm/trunk/lib/MC/CMakeLists.txt
> > llvm/trunk/lib/MC/MCAsmStreamer.cpp
> > llvm/trunk/lib/MC/MCStreamer.cpp
> > llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
> > llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
> > llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
> > llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
> > llvm/trunk/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
> > llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
> > llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
> > llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
> > llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
> > llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
> > llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h
> > llvm/trunk/lib/Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp
> > llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
> >
> > Modified: llvm/trunk/include/llvm/MC/MCInstrDesc.h
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/
> llvm/MC/MCInstrDesc.h?rev=283691&r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/include/llvm/MC/MCInstrDesc.h (original)
> > +++ llvm/trunk/include/llvm/MC/MCInstrDesc.h Sat Oct 8 23:39:13 2016
> > @@ -294,80 +294,13 @@ public:
> > /// \brief Return true if this instruction is a comparison.
> > bool isCompare() const { return Flags & (1ULL << MCID::Compare); }
> >
> > - /// \brief Return true if this instruction is a move immediate
> > - /// (including conditional moves) instruction.
> > - bool isMoveImmediate() const { return Flags & (1ULL <<
> MCID::MoveImm); }
> > -
> > - /// \brief Return true if this instruction is a bitcast instruction.
> > - bool isBitcast() const { return Flags & (1ULL << MCID::Bitcast); }
> > -
> > /// \brief Return true if this is a select instruction.
> > bool isSelect() const { return Flags & (1ULL << MCID::Select); }
> >
> > - /// \brief Return true if this instruction cannot be safely
> > - /// duplicated. For example, if the instruction has a unique labels
> attached
> > - /// to it, duplicating it would cause multiple definition errors.
> > - bool isNotDuplicable() const { return Flags & (1ULL <<
> MCID::NotDuplicable); }
> > -
> > /// \brief Returns true if the specified instruction has a delay slot
> which
> > /// must be filled by the code generator.
> > bool hasDelaySlot() const { return Flags & (1ULL << MCID::DelaySlot); }
> >
> > - /// \brief Return true for instructions that can be folded as memory
> operands
> > - /// in other instructions. The most common use for this is
> instructions that
> > - /// are simple loads from memory that don't modify the loaded value
> in any
> > - /// way, but it can also be used for instructions that can be
> expressed as
> > - /// constant-pool loads, such as V_SETALLONES on x86, to allow them
> to be
> > - /// folded when it is beneficial. This should only be set on
> instructions
> > - /// that return a value in their only virtual register definition.
> > - bool canFoldAsLoad() const { return Flags & (1ULL <<
> MCID::FoldableAsLoad); }
> > -
> > - /// \brief Return true if this instruction behaves
> > - /// the same way as the generic REG_SEQUENCE instructions.
> > - /// E.g., on ARM,
> > - /// dX VMOVDRR rY, rZ
> > - /// is equivalent to
> > - /// dX = REG_SEQUENCE rY, ssub_0, rZ, ssub_1.
> > - ///
> > - /// Note that for the optimizers to be able to take advantage of
> > - /// this property, TargetInstrInfo::getRegSequenceLikeInputs has to
> be
> > - /// override accordingly.
> > - bool isRegSequenceLike() const { return Flags & (1ULL <<
> MCID::RegSequence); }
> > -
> > - /// \brief Return true if this instruction behaves
> > - /// the same way as the generic EXTRACT_SUBREG instructions.
> > - /// E.g., on ARM,
> > - /// rX, rY VMOVRRD dZ
> > - /// is equivalent to two EXTRACT_SUBREG:
> > - /// rX = EXTRACT_SUBREG dZ, ssub_0
> > - /// rY = EXTRACT_SUBREG dZ, ssub_1
> > - ///
> > - /// Note that for the optimizers to be able to take advantage of
> > - /// this property, TargetInstrInfo::getExtractSubregLikeInputs has
> to be
> > - /// override accordingly.
> > - bool isExtractSubregLike() const {
> > - return Flags & (1ULL << MCID::ExtractSubreg);
> > - }
> > -
> > - /// \brief Return true if this instruction behaves
> > - /// the same way as the generic INSERT_SUBREG instructions.
> > - /// E.g., on ARM,
> > - /// dX = VSETLNi32 dY, rZ, Imm
> > - /// is equivalent to a INSERT_SUBREG:
> > - /// dX = INSERT_SUBREG dY, rZ, translateImmToSubIdx(Imm)
> > - ///
> > - /// Note that for the optimizers to be able to take advantage of
> > - /// this property, TargetInstrInfo::getInsertSubregLikeInputs has to
> be
> > - /// override accordingly.
> > - bool isInsertSubregLike() const { return Flags & (1ULL <<
> MCID::InsertSubreg); }
> > -
> > -
> > - /// \brief Return true if this instruction is convergent.
> > - ///
> > - /// Convergent instructions may not be made control-dependent on any
> > - /// additional values.
> > - bool isConvergent() const { return Flags & (1ULL <<
> MCID::Convergent); }
> > -
> > //===-------------------------------------------------------
> -------------===//
> > // Side Effect Analysis
> > //===-------------------------------------------------------
> -------------===//
> > @@ -383,22 +316,6 @@ public:
> > /// may not actually modify anything, for example.
> > bool mayStore() const { return Flags & (1ULL << MCID::MayStore); }
> >
> > - /// \brief Return true if this instruction has side
> > - /// effects that are not modeled by other flags. This does not
> return true
> > - /// for instructions whose effects are captured by:
> > - ///
> > - /// 1. Their operand list and implicit definition/use list.
> Register use/def
> > - /// info is explicit for instructions.
> > - /// 2. Memory accesses. Use mayLoad/mayStore.
> > - /// 3. Calling, branching, returning: use isCall/isReturn/isBranch.
> > - ///
> > - /// Examples of side effects would be modifying 'invisible' machine
> state like
> > - /// a control register, flushing a cache, modifying a register
> invisible to
> > - /// LLVM, etc.
> > - bool hasUnmodeledSideEffects() const {
> > - return Flags & (1ULL << MCID::UnmodeledSideEffects);
> > - }
> > -
> > //===-------------------------------------------------------
> -------------===//
> > // Flags that indicate whether an instruction can be modified by a
> method.
> > //===-------------------------------------------------------
> -------------===//
> > @@ -415,36 +332,6 @@ public:
> > /// commute them.
> > bool isCommutable() const { return Flags & (1ULL << MCID::Commutable);
> }
> >
> > - /// \brief Return true if this is a 2-address instruction which can
> be changed
> > - /// into a 3-address instruction if needed. Doing this
> transformation can be
> > - /// profitable in the register allocator, because it means that the
> > - /// instruction can use a 2-address form if possible, but degrade
> into a less
> > - /// efficient form if the source and dest register cannot be assigned
> to the
> > - /// same register. For example, this allows the x86 backend to turn
> a "shl
> > - /// reg, 3" instruction into an LEA instruction, which is the same
> speed as
> > - /// the shift but has bigger code size.
> > - ///
> > - /// If this returns true, then the target must implement the
> > - /// TargetInstrInfo::convertToThreeAddress method for this
> instruction, which
> > - /// is allowed to fail if the transformation isn't valid for this
> specific
> > - /// instruction (e.g. shl reg, 4 on x86).
> > - ///
> > - bool isConvertibleTo3Addr() const {
> > - return Flags & (1ULL << MCID::ConvertibleTo3Addr);
> > - }
> > -
> > - /// \brief Return true if this instruction requires custom insertion
> support
> > - /// when the DAG scheduler is inserting it into a machine basic
> block. If
> > - /// this is true for the instruction, it basically means that it is a
> pseudo
> > - /// instruction used at SelectionDAG time that is expanded out into
> magic code
> > - /// by the target when MachineInstrs are formed.
> > - ///
> > - /// If this is true, the TargetLoweringInfo::InsertAtEndOfBasicBlock
> method
> > - /// is used to insert this into the MachineBasicBlock.
> > - bool usesCustomInsertionHook() const {
> > - return Flags & (1ULL << MCID::UsesCustomInserter);
> > - }
> > -
> > /// \brief Return true if this instruction requires *adjustment* after
> > /// instruction selection by calling a target hook. For example, this
> can be
> > /// used to fill in ARM 's' optional operand depending on whether the
> > @@ -461,37 +348,6 @@ public:
> > return Flags & (1ULL << MCID::Rematerializable);
> > }
> >
> > - /// \brief Returns true if this instruction has the same cost (or
> less) than a
> > - /// move instruction. This is useful during certain types of
> optimizations
> > - /// (e.g., remat during two-address conversion or machine licm) where
> we would
> > - /// like to remat or hoist the instruction, but not if it costs more
> than
> > - /// moving the instruction into the appropriate register. Note, we
> are not
> > - /// marking copies from and to the same register class with this flag.
> > - ///
> > - /// This method could be called by interface TargetInstrInfo::
> isAsCheapAsAMove
> > - /// for different subtargets.
> > - bool isAsCheapAsAMove() const { return Flags & (1ULL <<
> MCID::CheapAsAMove); }
> > -
> > - /// \brief Returns true if this instruction source operands have
> special
> > - /// register allocation requirements that are not captured by the
> operand
> > - /// register classes. e.g. ARM::STRD's two source registers must be
> an even /
> > - /// odd pair, ARM::STM registers have to be in ascending order.
> Post-register
> > - /// allocation passes should not attempt to change allocations for
> sources of
> > - /// instructions with this flag.
> > - bool hasExtraSrcRegAllocReq() const {
> > - return Flags & (1ULL << MCID::ExtraSrcRegAllocReq);
> > - }
> > -
> > - /// \brief Returns true if this instruction def operands have special
> register
> > - /// allocation requirements that are not captured by the operand
> register
> > - /// classes. e.g. ARM::LDRD's two def registers must be an even / odd
> pair,
> > - /// ARM::LDM registers have to be in ascending order. Post-register
> > - /// allocation passes should not attempt to change allocations for
> definitions
> > - /// of instructions with this flag.
> > - bool hasExtraDefRegAllocReq() const {
> > - return Flags & (1ULL << MCID::ExtraDefRegAllocReq);
> > - }
> > -
> > /// \brief Return a list of registers that are potentially read by any
> > /// instance of this machine instruction. For example, on X86, the
> "adc"
> > /// instruction adds two register operands and adds the carry bit in
> from the
> > @@ -535,16 +391,6 @@ public:
> > }
> >
> > /// \brief Return true if this instruction implicitly
> > - /// uses the specified physical register.
> > - bool hasImplicitUseOfPhysReg(unsigned Reg) const {
> > - if (const MCPhysReg *ImpUses = ImplicitUses)
> > - for (; *ImpUses; ++ImpUses)
> > - if (*ImpUses == Reg)
> > - return true;
> > - return false;
> > - }
> > -
> > - /// \brief Return true if this instruction implicitly
> > /// defines the specified physical register.
> > bool hasImplicitDefOfPhysReg(unsigned Reg,
> > const MCRegisterInfo *MRI = nullptr)
> const;
> >
> > Modified: llvm/trunk/include/llvm/MC/MCMachObjectWriter.h
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/
> llvm/MC/MCMachObjectWriter.h?rev=283691&r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/include/llvm/MC/MCMachObjectWriter.h (original)
> > +++ llvm/trunk/include/llvm/MC/MCMachObjectWriter.h Sat Oct 8 23:39:13
> 2016
> > @@ -27,16 +27,11 @@ class MCMachObjectTargetWriter {
> > const unsigned Is64Bit : 1;
> > const uint32_t CPUType;
> > const uint32_t CPUSubtype;
> > - unsigned LocalDifference_RIT;
> >
> > protected:
> > MCMachObjectTargetWriter(bool Is64Bit_, uint32_t CPUType_,
> > uint32_t CPUSubtype_);
> >
> > - void setLocalDifferenceRelocationType(unsigned Type) {
> > - LocalDifference_RIT = Type;
> > - }
> > -
> > public:
> > virtual ~MCMachObjectTargetWriter();
> >
> > @@ -53,9 +48,6 @@ public:
> > bool is64Bit() const { return Is64Bit; }
> > uint32_t getCPUType() const { return CPUType; }
> > uint32_t getCPUSubtype() const { return CPUSubtype; }
> > - unsigned getLocalDifferenceRelocationType() const {
> > - return LocalDifference_RIT;
> > - }
> >
> > /// @}
> >
> >
> > Modified: llvm/trunk/include/llvm/MC/MCParser/MCParsedAsmOperand.h
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/
> llvm/MC/MCParser/MCParsedAsmOperand.h?rev=283691&r1=283690&r2=283691&
> view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/include/llvm/MC/MCParser/MCParsedAsmOperand.h (original)
> > +++ llvm/trunk/include/llvm/MC/MCParser/MCParsedAsmOperand.h Sat Oct 8
> 23:39:13 2016
> > @@ -64,21 +64,11 @@ public:
> >
> > /// getStartLoc - Get the location of the first token of this operand.
> > virtual SMLoc getStartLoc() const = 0;
> > - /// getEndLoc - Get the location of the last token of this operand.
> > - virtual SMLoc getEndLoc() const = 0;
> >
> > /// needAddressOf - Do we need to emit code to get the address of the
> > /// variable/label? Only valid when parsing MS-style inline assembly.
> > virtual bool needAddressOf() const { return false; }
> >
> > - /// isOffsetOf - Do we need to emit code to get the offset of the
> variable,
> > - /// rather then the value of the variable? Only valid when parsing
> MS-style
> > - /// inline assembly.
> > - virtual bool isOffsetOf() const { return false; }
> > -
> > - /// getOffsetOfLoc - Get the location of the offset operator.
> > - virtual SMLoc getOffsetOfLoc() const { return SMLoc(); }
> > -
> > /// print - Print a debug representation of the operand to the given
> stream.
> > virtual void print(raw_ostream &OS) const = 0;
> > /// dump - Print to the debug stream.
> >
> > Modified: llvm/trunk/include/llvm/MC/MCParser/MCTargetAsmParser.h
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/
> llvm/MC/MCParser/MCTargetAsmParser.h?rev=283691&r1=283690&r2=283691&
> view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/include/llvm/MC/MCParser/MCTargetAsmParser.h (original)
> > +++ llvm/trunk/include/llvm/MC/MCParser/MCTargetAsmParser.h Sat Oct 8
> 23:39:13 2016
> > @@ -209,9 +209,6 @@ public:
> > return Match_Success;
> > }
> >
> > - virtual void convertToMapAndConstraints(unsigned Kind,
> > - const OperandVector
> &Operands) = 0;
> > -
> > // Return whether this parser uses assignment statements with equals
> tokens
> > virtual bool equalIsAsmAssignment() { return true; };
> > // Return whether this start of statement identifier is a label
> >
> > Modified: llvm/trunk/include/llvm/MC/MCStreamer.h
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/
> llvm/MC/MCStreamer.h?rev=283691&r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/include/llvm/MC/MCStreamer.h (original)
> > +++ llvm/trunk/include/llvm/MC/MCStreamer.h Sat Oct 8 23:39:13 2016
> > @@ -199,8 +199,6 @@ protected:
> > return CurrentWinFrameInfo;
> > }
> >
> > - virtual void EmitWindowsUnwindTables();
> > -
> > virtual void EmitRawTextImpl(StringRef String);
> >
> > public:
> > @@ -277,8 +275,6 @@ public:
> > /// \brief Add explicit comment T. T is required to be a valid
> > /// comment in the output and does not need to be escaped.
> > virtual void addExplicitComment(const Twine &T);
> > - /// \brief Emit added explicit comments.
> > - virtual void emitExplicitComments();
> >
> > /// AddBlankLine - Emit a blank line to a .s file to pretty it up.
> > virtual void AddBlankLine() {}
> >
> > Modified: llvm/trunk/include/llvm/MC/MCWin64EH.h
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/
> llvm/MC/MCWin64EH.h?rev=283691&r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/include/llvm/MC/MCWin64EH.h (original)
> > +++ llvm/trunk/include/llvm/MC/MCWin64EH.h Sat Oct 8 23:39:13 2016
> > @@ -51,10 +51,10 @@ struct Instruction {
> > }
> > };
> >
> > -class UnwindEmitter : public WinEH::UnwindEmitter {
> > +class UnwindEmitter {
> > public:
> > - void Emit(MCStreamer &Streamer) const override;
> > - void EmitUnwindInfo(MCStreamer &Streamer, WinEH::FrameInfo *FI) const
> override;
> > + void Emit(MCStreamer &Streamer) const;
> > + void EmitUnwindInfo(MCStreamer &Streamer, WinEH::FrameInfo *FI) const;
> > };
> > }
> > } // end namespace llvm
> >
> > Modified: llvm/trunk/include/llvm/MC/MCWinEH.h
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/
> llvm/MC/MCWinEH.h?rev=283691&r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/include/llvm/MC/MCWinEH.h (original)
> > +++ llvm/trunk/include/llvm/MC/MCWinEH.h Sat Oct 8 23:39:13 2016
> > @@ -52,15 +52,6 @@ struct FrameInfo {
> > : Begin(BeginFuncEHLabel), Function(Function),
> > ChainedParent(ChainedParent) {}
> > };
> > -
> > -class UnwindEmitter {
> > -public:
> > - virtual ~UnwindEmitter();
> > -
> > - /// This emits the unwind info sections (.pdata and .xdata in
> PE/COFF).
> > - virtual void Emit(MCStreamer &Streamer) const = 0;
> > - virtual void EmitUnwindInfo(MCStreamer &Streamer, FrameInfo *FI)
> const = 0;
> > -};
> > }
> > }
> >
> >
> > Modified: llvm/trunk/lib/MC/CMakeLists.txt
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/
> CMakeLists.txt?rev=283691&r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/MC/CMakeLists.txt (original)
> > +++ llvm/trunk/lib/MC/CMakeLists.txt Sat Oct 8 23:39:13 2016
> > @@ -41,7 +41,6 @@ add_llvm_library(LLVMMC
> > MCTargetOptions.cpp
> > MCValue.cpp
> > MCWin64EH.cpp
> > - MCWinEH.cpp
> > MachObjectWriter.cpp
> > StringTableBuilder.cpp
> > SubtargetFeature.cpp
> >
> > Modified: llvm/trunk/lib/MC/MCAsmStreamer.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/
> MCAsmStreamer.cpp?rev=283691&r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/MC/MCAsmStreamer.cpp (original)
> > +++ llvm/trunk/lib/MC/MCAsmStreamer.cpp Sat Oct 8 23:39:13 2016
> > @@ -117,7 +117,7 @@ public:
> > void emitRawComment(const Twine &T, bool TabPrefix = true) override;
> >
> > void addExplicitComment(const Twine &T) override;
> > - void emitExplicitComments() override;
> > + void emitExplicitComments();
> >
> > /// AddBlankLine - Emit a blank line to a .s file to pretty it up.
> > void AddBlankLine() override {
> >
> > Modified: llvm/trunk/lib/MC/MCStreamer.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/
> MCStreamer.cpp?rev=283691&r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/MC/MCStreamer.cpp (original)
> > +++ llvm/trunk/lib/MC/MCStreamer.cpp Sat Oct 8 23:39:13 2016
> > @@ -72,7 +72,6 @@ raw_ostream &MCStreamer::GetCommentOS()
> > void MCStreamer::emitRawComment(const Twine &T, bool TabPrefix) {}
> >
> > void MCStreamer::addExplicitComment(const Twine &T) {}
> > -void MCStreamer::emitExplicitComments() {}
> >
> > void MCStreamer::generateCompactUnwindEncodings(MCAsmBackend *MAB) {
> > for (auto &FI : DwarfFrameInfos)
> > @@ -713,9 +712,6 @@ void MCStreamer::EmitRawText(const Twine
> > EmitRawTextImpl(T.toStringRef(Str));
> > }
> >
> > -void MCStreamer::EmitWindowsUnwindTables() {
> > -}
> > -
> > void MCStreamer::Finish() {
> > if (!DwarfFrameInfos.empty() && !DwarfFrameInfos.back().End)
> > report_fatal_error("Unfinished frame!");
> >
> > Removed: llvm/trunk/lib/MC/MCWinEH.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/
> MCWinEH.cpp?rev=283690&view=auto
> > ============================================================
> ==================
> > --- llvm/trunk/lib/MC/MCWinEH.cpp (original)
> > +++ llvm/trunk/lib/MC/MCWinEH.cpp (removed)
> > @@ -1,26 +0,0 @@
> > -//===- lib/MC/MCWinEH.cpp - Windows EH implementation
> ---------------------===//
> > -//
> > -// The LLVM Compiler Infrastructure
> > -//
> > -// This file is distributed under the University of Illinois Open Source
> > -// License. See LICENSE.TXT for details.
> > -//
> > -//===------------------------------------------------------
> ----------------===//
> > -
> > -#include "llvm/ADT/StringRef.h"
> > -#include "llvm/MC/MCContext.h"
> > -#include "llvm/MC/MCObjectFileInfo.h"
> > -#include "llvm/MC/MCSectionCOFF.h"
> > -#include "llvm/MC/MCStreamer.h"
> > -#include "llvm/MC/MCSymbol.h"
> > -#include "llvm/MC/MCWinEH.h"
> > -#include "llvm/Support/COFF.h"
> > -
> > -namespace llvm {
> > -namespace WinEH {
> > -
> > -UnwindEmitter::~UnwindEmitter() {}
> > -
> > -}
> > -}
> > -
> >
> > Modified: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> AArch64/AsmParser/AArch64AsmParser.cpp?rev=283691&r1=283690&r2=283691&
> view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
> (original)
> > +++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Sat
> Oct 8 23:39:13 2016
> > @@ -326,7 +326,7 @@ public:
> > /// getStartLoc - Get the location of the first token of this operand.
> > SMLoc getStartLoc() const override { return StartLoc; }
> > /// getEndLoc - Get the location of the last token of this operand.
> > - SMLoc getEndLoc() const override { return EndLoc; }
> > + SMLoc getEndLoc() const { return EndLoc; }
> >
> > StringRef getToken() const {
> > assert(Kind == k_Token && "Invalid access!");
> >
> > Modified: llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> AMDGPU/AsmParser/AMDGPUAsmParser.cpp?rev=283691&r1=283690&r2=283691&
> view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
> (original)
> > +++ llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp Sat Oct
> 8 23:39:13 2016
> > @@ -379,7 +379,7 @@ public:
> > return StartLoc;
> > }
> >
> > - SMLoc getEndLoc() const override {
> > + SMLoc getEndLoc() const {
> > return EndLoc;
> > }
> >
> >
> > Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> ARM/AsmParser/ARMAsmParser.cpp?rev=283691&r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
> > +++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Sat Oct 8
> 23:39:13 2016
> > @@ -752,7 +752,7 @@ public:
> > /// getStartLoc - Get the location of the first token of this operand.
> > SMLoc getStartLoc() const override { return StartLoc; }
> > /// getEndLoc - Get the location of the last token of this operand.
> > - SMLoc getEndLoc() const override { return EndLoc; }
> > + SMLoc getEndLoc() const { return EndLoc; }
> > /// getLocRange - Get the range between the first and last token of
> this
> > /// operand.
> > SMRange getLocRange() const { return SMRange(StartLoc, EndLoc); }
> >
> > Modified: llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> Hexagon/AsmParser/HexagonAsmParser.cpp?rev=283691&r1=283690&r2=283691&
> view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
> (original)
> > +++ llvm/trunk/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp Sat
> Oct 8 23:39:13 2016
> > @@ -222,7 +222,7 @@ public:
> > SMLoc getStartLoc() const { return StartLoc; }
> >
> > /// getEndLoc - Get the location of the last token of this operand.
> > - SMLoc getEndLoc() const { return EndLoc; }
> > + SMLoc getEndLoc() { return EndLoc; }
> >
> > unsigned getReg() const {
> > assert(Kind == Register && "Invalid access!");
> >
> > Modified: llvm/trunk/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> Lanai/AsmParser/LanaiAsmParser.cpp?rev=283691&
> r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp (original)
> > +++ llvm/trunk/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp Sat Oct 8
> 23:39:13 2016
> > @@ -134,7 +134,7 @@ public:
> > SMLoc getStartLoc() const override { return StartLoc; }
> >
> > // getEndLoc - Gets location of the last token of this operand
> > - SMLoc getEndLoc() const override { return EndLoc; }
> > + SMLoc getEndLoc() const { return EndLoc; }
> >
> > unsigned getReg() const override {
> > assert(isReg() && "Invalid type access!");
> >
> > Modified: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> Mips/AsmParser/MipsAsmParser.cpp?rev=283691&r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (original)
> > +++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp Sat Oct 8
> 23:39:13 2016
> > @@ -1474,7 +1474,7 @@ public:
> > /// getStartLoc - Get the location of the first token of this operand.
> > SMLoc getStartLoc() const override { return StartLoc; }
> > /// getEndLoc - Get the location of the last token of this operand.
> > - SMLoc getEndLoc() const override { return EndLoc; }
> > + SMLoc getEndLoc() const { return EndLoc; }
> >
> > virtual ~MipsOperand() {
> > switch (Kind) {
> >
> > Modified: llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> PowerPC/AsmParser/PPCAsmParser.cpp?rev=283691&
> r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp (original)
> > +++ llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp Sat Oct 8
> 23:39:13 2016
> > @@ -394,7 +394,7 @@ public:
> > SMLoc getStartLoc() const override { return StartLoc; }
> >
> > /// getEndLoc - Get the location of the last token of this operand.
> > - SMLoc getEndLoc() const override { return EndLoc; }
> > + SMLoc getEndLoc() const { return EndLoc; }
> >
> > /// isPPC64 - True if this operand is for an instruction in 64-bit
> mode.
> > bool isPPC64() const { return IsPPC64; }
> >
> > Modified: llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> Sparc/AsmParser/SparcAsmParser.cpp?rev=283691&
> r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp (original)
> > +++ llvm/trunk/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp Sat Oct 8
> 23:39:13 2016
> > @@ -281,7 +281,7 @@ public:
> > return StartLoc;
> > }
> > /// getEndLoc - Get the location of the last token of this operand.
> > - SMLoc getEndLoc() const override {
> > + SMLoc getEndLoc() const {
> > return EndLoc;
> > }
> >
> >
> > Modified: llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> SystemZ/AsmParser/SystemZAsmParser.cpp?rev=283691&r1=283690&r2=283691&
> view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
> (original)
> > +++ llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp Sat
> Oct 8 23:39:13 2016
> > @@ -261,7 +261,7 @@ public:
> >
> > // Override MCParsedAsmOperand.
> > SMLoc getStartLoc() const override { return StartLoc; }
> > - SMLoc getEndLoc() const override { return EndLoc; }
> > + SMLoc getEndLoc() const { return EndLoc; }
> > void print(raw_ostream &OS) const override;
> >
> > // Used by the TableGen code to add particular types of operand
> >
> > Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> X86/AsmParser/X86AsmParser.cpp?rev=283691&r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
> > +++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Sat Oct 8
> 23:39:13 2016
> > @@ -1696,7 +1696,7 @@ std::unique_ptr<X86Operand> X86AsmParser
> > unsigned RegNo = is64BitMode() ? X86::RBX : (Parse32 ? X86::EBX :
> X86::BX);
> >
> > return X86Operand::CreateReg(RegNo, Start, End, /*GetAddress=*/true,
> > - OffsetOfLoc, Identifier, Info.OpDecl);
> > + Identifier, Info.OpDecl);
> > }
> >
> > enum IntelOperatorKind {
> >
> > Modified: llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> X86/AsmParser/X86Operand.h?rev=283691&r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h (original)
> > +++ llvm/trunk/lib/Target/X86/AsmParser/X86Operand.h Sat Oct 8
> 23:39:13 2016
> > @@ -31,7 +31,6 @@ struct X86Operand : public MCParsedAsmOp
> > } Kind;
> >
> > SMLoc StartLoc, EndLoc;
> > - SMLoc OffsetOfLoc;
> > StringRef SymName;
> > void *OpDecl;
> > bool AddressOf;
> > @@ -75,12 +74,10 @@ struct X86Operand : public MCParsedAsmOp
> > /// getStartLoc - Get the location of the first token of this operand.
> > SMLoc getStartLoc() const override { return StartLoc; }
> > /// getEndLoc - Get the location of the last token of this operand.
> > - SMLoc getEndLoc() const override { return EndLoc; }
> > + SMLoc getEndLoc() const { return EndLoc; }
> > /// getLocRange - Get the range between the first and last token of
> this
> > /// operand.
> > SMRange getLocRange() const { return SMRange(StartLoc, EndLoc); }
> > - /// getOffsetOfLoc - Get the location of the offset operator.
> > - SMLoc getOffsetOfLoc() const override { return OffsetOfLoc; }
> >
> > void print(raw_ostream &OS) const override {}
> >
> > @@ -197,10 +194,6 @@ struct X86Operand : public MCParsedAsmOp
> > return isImmUnsignedi8Value(CE->getValue());
> > }
> >
> > - bool isOffsetOf() const override {
> > - return OffsetOfLoc.getPointer();
> > - }
> > -
> > bool needAddressOf() const override {
> > return AddressOf;
> > }
> > @@ -474,12 +467,11 @@ struct X86Operand : public MCParsedAsmOp
> >
> > static std::unique_ptr<X86Operand>
> > CreateReg(unsigned RegNo, SMLoc StartLoc, SMLoc EndLoc,
> > - bool AddressOf = false, SMLoc OffsetOfLoc = SMLoc(),
> > - StringRef SymName = StringRef(), void *OpDecl = nullptr) {
> > + bool AddressOf = false, StringRef SymName = StringRef(),
> > + void *OpDecl = nullptr) {
> > auto Res = llvm::make_unique<X86Operand>(Register, StartLoc,
> EndLoc);
> > Res->Reg.RegNo = RegNo;
> > Res->AddressOf = AddressOf;
> > - Res->OffsetOfLoc = OffsetOfLoc;
> > Res->SymName = SymName;
> > Res->OpDecl = OpDecl;
> > return Res;
> >
> > Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/
> X86/MCTargetDesc/X86WinCOFFStreamer.cpp?rev=283691&r1=283690&r2=283691&
> view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/lib/Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp
> (original)
> > +++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86WinCOFFStreamer.cpp Sat
> Oct 8 23:39:13 2016
> > @@ -22,7 +22,7 @@ public:
> > : MCWinCOFFStreamer(C, AB, *CE, OS) {}
> >
> > void EmitWinEHHandlerData() override;
> > - void EmitWindowsUnwindTables() override;
> > + void EmitWindowsUnwindTables();
> > void FinishImpl() override;
> > };
> >
> >
> > Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp
> > URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/
> TableGen/AsmMatcherEmitter.cpp?rev=283691&r1=283690&r2=283691&view=diff
> > ============================================================
> ==================
> > --- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original)
> > +++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Sat Oct 8 23:39:13
> 2016
> > @@ -2893,7 +2893,7 @@ void AsmMatcherEmitter::run(raw_ostream
> > << " const OperandVector &Operands);\n";
> > }
> > OS << " void convertToMapAndConstraints(unsigned Kind,\n
> ";
> > - OS << " const OperandVector &Operands) override;\n";
> > + OS << " const OperandVector &Operands);\n";
> > if (HasMnemonicFirst)
> > OS << " bool mnemonicIsValid(StringRef Mnemonic, unsigned
> VariantID);\n";
> > OS << " unsigned MatchInstructionImpl(const OperandVector
> &Operands,\n"
> >
> >
> > _______________________________________________
> > llvm-commits mailing list
> > llvm-commits at lists.llvm.org
> > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits
>
>
--
--
Peter
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