[PATCH] D25375: AMDGPU/SI: Add support for 8-byte relocations

[Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL283593: AMDGPU/SI: Add support for 8-byte relocations (authored by tstellar).

Changed prior to commit:
  https://reviews.llvm.org/D25375?vs=73967&id=73981#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D25375

Files:
  llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
  llvm/trunk/test/MC/AMDGPU/reloc.s


Index: llvm/trunk/test/MC/AMDGPU/reloc.s
===================================================================
--- llvm/trunk/test/MC/AMDGPU/reloc.s
+++ llvm/trunk/test/MC/AMDGPU/reloc.s
@@ -1,10 +1,15 @@
 // RUN: llvm-mc -filetype=obj -triple amdgcn-- -mcpu=kaveri -show-encoding %s | llvm-readobj -relocations | FileCheck %s
 
 // CHECK: Relocations [
+// CHECK: .rel.text {
 // CHECK: R_AMDGPU_ABS32_LO SCRATCH_RSRC_DWORD0 0x0
 // CHECK: R_AMDGPU_ABS32_HI SCRATCH_RSRC_DWORD1 0x0
 // CHECK: R_AMDGPU_GOTPCREL global_var 0x0
 // CHECK: R_AMDGPU_ABS32 var 0x0
+// CHECK: }
+// CHECK: .rel.data {
+// CHECK: R_AMDGPU_ABS64 temp 0x0
+// CHECK: }
 // CHECK: ]
 
 kernel:
@@ -18,3 +23,13 @@
 
 .section nonalloc, "w", @progbits
   .long var, common_var
+
+
+// 8 byte relocations
+	.type	ptr, at object
+	.data
+	.globl	ptr
+	.p2align	3
+ptr:
+	.quad	temp
+	.size	ptr, 8
Index: llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
===================================================================
--- llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
+++ llvm/trunk/lib/Target/AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp
@@ -62,6 +62,8 @@
   case FK_Data_4:
   case FK_SecRel_4:
     return ELF::R_AMDGPU_ABS32;
+  case FK_Data_8:
+    return ELF::R_AMDGPU_ABS64;
   }
 
   llvm_unreachable("unhandled relocation type");


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