[llvm] r283469 - Revert "AMDGPU: Support using tablegened MC pseudo expansions"
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 6 10:08:01 PDT 2016
Author: arsenm
Date: Thu Oct 6 12:08:01 2016
New Revision: 283469
URL: http://llvm.org/viewvc/llvm-project?rev=283469&view=rev
Log:
Revert "AMDGPU: Support using tablegened MC pseudo expansions"
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.h
llvm/trunk/lib/Target/AMDGPU/CMakeLists.txt
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp?rev=283469&r1=283468&r2=283469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp Thu Oct 6 12:08:01 2016
@@ -93,7 +93,7 @@ extern "C" void LLVMInitializeAMDGPUAsmP
AMDGPUAsmPrinter::AMDGPUAsmPrinter(TargetMachine &TM,
std::unique_ptr<MCStreamer> Streamer)
- : AsmPrinter(TM, std::move(Streamer)) {}
+ : AsmPrinter(TM, std::move(Streamer)) {}
StringRef AMDGPUAsmPrinter::getPassName() const {
return "AMDGPU Assembly Printer";
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.h?rev=283469&r1=283468&r2=283469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUAsmPrinter.h Thu Oct 6 12:08:01 2016
@@ -15,13 +15,10 @@
#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
#define LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
-#include "AMDGPUMCInstLower.h"
-
#include "llvm/CodeGen/AsmPrinter.h"
#include <vector>
namespace llvm {
-class MCOperand;
class AMDGPUAsmPrinter final : public AsmPrinter {
private:
@@ -123,15 +120,6 @@ public:
StringRef getPassName() const override;
- /// \brief Wrapper for MCInstLowering.lowerOperand() for the tblgen'erated
- /// pseudo lowering.
- bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
-
- /// \brief tblgen'erated driver function for lowering simple MI->MC pseudo
- /// instructions.
- bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
- const MachineInstr *MI);
-
/// Implemented in AMDGPUMCInstLower.cpp
void EmitInstruction(const MachineInstr *MI) override;
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp?rev=283469&r1=283468&r2=283469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp Thu Oct 6 12:08:01 2016
@@ -36,9 +36,6 @@
using namespace llvm;
-#include "AMDGPUGenMCPseudoLowering.inc"
-
-
AMDGPUMCInstLower::AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &st,
const AsmPrinter &ap):
Ctx(ctx), ST(st), AP(ap) { }
@@ -71,43 +68,6 @@ const MCExpr *AMDGPUMCInstLower::getLong
return MCBinaryExpr::createSub(SrcBBSym, DestBBSym, Ctx);
}
-bool AMDGPUMCInstLower::lowerOperand(const MachineOperand &MO,
- MCOperand &MCOp) const {
- switch (MO.getType()) {
- default:
- llvm_unreachable("unknown operand type");
- case MachineOperand::MO_Immediate:
- MCOp = MCOperand::createImm(MO.getImm());
- return true;
- case MachineOperand::MO_Register:
- MCOp = MCOperand::createReg(AMDGPU::getMCReg(MO.getReg(), ST));
- return true;
- case MachineOperand::MO_MachineBasicBlock:
- MCOp = MCOperand::createExpr(MCSymbolRefExpr::create(
- MO.getMBB()->getSymbol(), Ctx));
- return true;
- case MachineOperand::MO_GlobalAddress: {
- const GlobalValue *GV = MO.getGlobal();
- SmallString<128> SymbolName;
- AP.getNameWithPrefix(SymbolName, GV);
- MCSymbol *Sym = Ctx.getOrCreateSymbol(SymbolName);
- const MCExpr *SymExpr =
- MCSymbolRefExpr::create(Sym, getVariantKind(MO.getTargetFlags()),Ctx);
- const MCExpr *Expr = MCBinaryExpr::createAdd(SymExpr,
- MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
- MCOp = MCOperand::createExpr(Expr);
- return true;
- }
- case MachineOperand::MO_ExternalSymbol: {
- MCSymbol *Sym = Ctx.getOrCreateSymbol(StringRef(MO.getSymbolName()));
- Sym->setExternal(true);
- const MCSymbolRefExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx);
- MCOp = MCOperand::createExpr(Expr);
- return true;
- }
- }
-}
-
void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
int MCOpcode = ST.getInstrInfo()->pseudoToMCOpcode(MI->getOpcode());
@@ -122,22 +82,54 @@ void AMDGPUMCInstLower::lower(const Mach
for (const MachineOperand &MO : MI->explicit_operands()) {
MCOperand MCOp;
- lowerOperand(MO, MCOp);
+ switch (MO.getType()) {
+ default:
+ llvm_unreachable("unknown operand type");
+ case MachineOperand::MO_Immediate:
+ MCOp = MCOperand::createImm(MO.getImm());
+ break;
+ case MachineOperand::MO_Register:
+ MCOp = MCOperand::createReg(AMDGPU::getMCReg(MO.getReg(), ST));
+ break;
+ case MachineOperand::MO_MachineBasicBlock:
+ if (MO.getTargetFlags() != 0) {
+ MCOp = MCOperand::createExpr(
+ getLongBranchBlockExpr(*MI->getParent(), MO));
+ } else {
+ MCOp = MCOperand::createExpr(
+ MCSymbolRefExpr::create(MO.getMBB()->getSymbol(), Ctx));
+ }
+
+ break;
+ case MachineOperand::MO_GlobalAddress: {
+ const GlobalValue *GV = MO.getGlobal();
+ SmallString<128> SymbolName;
+ AP.getNameWithPrefix(SymbolName, GV);
+ MCSymbol *Sym = Ctx.getOrCreateSymbol(SymbolName);
+ const MCExpr *SymExpr =
+ MCSymbolRefExpr::create(Sym, getVariantKind(MO.getTargetFlags()),Ctx);
+ const MCExpr *Expr = MCBinaryExpr::createAdd(SymExpr,
+ MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
+ MCOp = MCOperand::createExpr(Expr);
+ break;
+ }
+ case MachineOperand::MO_ExternalSymbol: {
+ MCSymbol *Sym = Ctx.getOrCreateSymbol(StringRef(MO.getSymbolName()));
+ Sym->setExternal(true);
+ const MCSymbolRefExpr *Expr = MCSymbolRefExpr::create(Sym, Ctx);
+ MCOp = MCOperand::createExpr(Expr);
+ break;
+ }
+ case MachineOperand::MO_MCSymbol:
+ MCOp = MCOperand::createExpr(
+ MCSymbolRefExpr::create(MO.getMCSymbol(), Ctx));
+ break;
+ }
OutMI.addOperand(MCOp);
}
}
-bool AMDGPUAsmPrinter::lowerOperand(const MachineOperand &MO,
- MCOperand &MCOp) const {
- const AMDGPUSubtarget &STI = MF->getSubtarget<AMDGPUSubtarget>();
- AMDGPUMCInstLower MCInstLowering(OutContext, STI, *this);
- return MCInstLowering.lowerOperand(MO, MCOp);
-}
-
void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
- if (emitPseudoExpansionLowering(*OutStreamer, MI))
- return;
-
const AMDGPUSubtarget &STI = MF->getSubtarget<AMDGPUSubtarget>();
AMDGPUMCInstLower MCInstLowering(OutContext, STI, *this);
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.h?rev=283469&r1=283468&r2=283469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPUMCInstLower.h Thu Oct 6 12:08:01 2016
@@ -20,7 +20,6 @@ class MachineOperand;
class MCContext;
class MCExpr;
class MCInst;
-class MCOperand;
class AMDGPUMCInstLower {
MCContext &Ctx;
@@ -34,8 +33,6 @@ public:
AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &ST,
const AsmPrinter &AP);
- bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
-
/// \brief Lower a MachineInstr to an MCInst
void lower(const MachineInstr *MI, MCInst &OutMI) const;
Modified: llvm/trunk/lib/Target/AMDGPU/CMakeLists.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/CMakeLists.txt?rev=283469&r1=283468&r2=283469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/CMakeLists.txt (original)
+++ llvm/trunk/lib/Target/AMDGPU/CMakeLists.txt Thu Oct 6 12:08:01 2016
@@ -11,7 +11,6 @@ tablegen(LLVM AMDGPUGenDFAPacketizer.inc
tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
-tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
add_public_tablegen_target(AMDGPUCommonTableGen)
# List of all GlobalISel files.
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