[lld] r283200 - [ELF] Set max page size to 64K for AArch64
Eugene Leviant via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 4 01:58:56 PDT 2016
Author: evgeny777
Date: Tue Oct 4 03:58:55 2016
New Revision: 283200
URL: http://llvm.org/viewvc/llvm-project?rev=283200&view=rev
Log:
[ELF] Set max page size to 64K for AArch64
Differential revision: https://reviews.llvm.org/D25079
Modified:
lld/trunk/ELF/Target.cpp
lld/trunk/test/ELF/aarch64-abs16.s
lld/trunk/test/ELF/aarch64-abs32.s
lld/trunk/test/ELF/aarch64-condb-reloc.s
lld/trunk/test/ELF/aarch64-copy.s
lld/trunk/test/ELF/aarch64-copy2.s
lld/trunk/test/ELF/aarch64-data-relocs.s
lld/trunk/test/ELF/aarch64-gnu-ifunc.s
lld/trunk/test/ELF/aarch64-prel16.s
lld/trunk/test/ELF/aarch64-prel32.s
lld/trunk/test/ELF/aarch64-relocs.s
lld/trunk/test/ELF/aarch64-tls-gdie.s
lld/trunk/test/ELF/aarch64-tls-gdle.s
lld/trunk/test/ELF/aarch64-tls-ie.s
lld/trunk/test/ELF/aarch64-tls-iele.s
lld/trunk/test/ELF/aarch64-tls-le.s
lld/trunk/test/ELF/aarch64-tls-static.s
lld/trunk/test/ELF/aarch64-tlsdesc.s
lld/trunk/test/ELF/aarch64-tstbr14-reloc.s
lld/trunk/test/ELF/basic-aarch64.s
lld/trunk/test/ELF/got-aarch64.s
lld/trunk/test/ELF/plt-aarch64.s
Modified: lld/trunk/ELF/Target.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/ELF/Target.cpp?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/ELF/Target.cpp (original)
+++ lld/trunk/ELF/Target.cpp Tue Oct 4 03:58:55 2016
@@ -1151,6 +1151,7 @@ AArch64TargetInfo::AArch64TargetInfo() {
GotPltEntrySize = 8;
PltEntrySize = 16;
PltHeaderSize = 32;
+ MaxPageSize = 65536;
// It doesn't seem to be documented anywhere, but tls on aarch64 uses variant
// 1 of the tls structures and the tcb size is 16.
Modified: lld/trunk/test/ELF/aarch64-abs16.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-abs16.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-abs16.s (original)
+++ lld/trunk/test/ELF/aarch64-abs16.s Tue Oct 4 03:58:55 2016
@@ -18,7 +18,7 @@ _start:
// S + A = 0xffff
// 11002: S = 0x100, A = -0x8100
// S + A = 0x8000
-// CHECK-NEXT: 11000 ffff0080
+// CHECK-NEXT: 20000 ffff0080
// RUN: not ld.lld %t.o %t255.o -o %t2
// | FileCheck %s --check-prefix=OVERFLOW
Modified: lld/trunk/test/ELF/aarch64-abs32.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-abs32.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-abs32.s (original)
+++ lld/trunk/test/ELF/aarch64-abs32.s Tue Oct 4 03:58:55 2016
@@ -14,11 +14,11 @@ _start:
// RUN: llvm-objdump -s -section=.data %t2 | FileCheck %s
// CHECK: Contents of section .data:
-// 11000: S = 0x100, A = 0xfffffeff
+// 20000: S = 0x100, A = 0xfffffeff
// S + A = 0xffffffff
-// 11004: S = 0x100, A = -0x80000100
+// 20004: S = 0x100, A = -0x80000100
// S + A = 0x80000000
-// CHECK-NEXT: 11000 ffffffff 00000080
+// CHECK-NEXT: 20000 ffffffff 00000080
// RUN: not ld.lld %t.o %t255.o -o %t2
// | FileCheck %s --check-prefix=OVERFLOW
Modified: lld/trunk/test/ELF/aarch64-condb-reloc.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-condb-reloc.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-condb-reloc.s (original)
+++ lld/trunk/test/ELF/aarch64-condb-reloc.s Tue Oct 4 03:58:55 2016
@@ -12,21 +12,21 @@
# 0x1102c - 16 = 0x1101c
# CHECK: Disassembly of section .text:
# CHECK-NEXT: _foo:
-# CHECK-NEXT: 11000: {{.*}} nop
-# CHECK-NEXT: 11004: {{.*}} nop
-# CHECK-NEXT: 11008: {{.*}} nop
-# CHECK-NEXT: 1100c: {{.*}} nop
+# CHECK-NEXT: 20000: {{.*}} nop
+# CHECK-NEXT: 20004: {{.*}} nop
+# CHECK-NEXT: 20008: {{.*}} nop
+# CHECK-NEXT: 2000c: {{.*}} nop
# CHECK: _bar:
-# CHECK-NEXT: 11010: {{.*}} nop
-# CHECK-NEXT: 11014: {{.*}} nop
-# CHECK-NEXT: 11018: {{.*}} nop
+# CHECK-NEXT: 20010: {{.*}} nop
+# CHECK-NEXT: 20014: {{.*}} nop
+# CHECK-NEXT: 20018: {{.*}} nop
# CHECK: _dah:
-# CHECK-NEXT: 1101c: {{.*}} nop
-# CHECK-NEXT: 11020: {{.*}} nop
+# CHECK-NEXT: 2001c: {{.*}} nop
+# CHECK-NEXT: 20020: {{.*}} nop
# CHECK: _start:
-# CHECK-NEXT: 11024: {{.*}} b.eq #-36
-# CHECK-NEXT: 11028: {{.*}} b.eq #-24
-# CHECK-NEXT: 1102c: {{.*}} b.eq #-16
+# CHECK-NEXT: 20024: {{.*}} b.eq #-36
+# CHECK-NEXT: 20028: {{.*}} b.eq #-24
+# CHECK-NEXT: 2002c: {{.*}} b.eq #-16
#DSOREL: Section {
#DSOREL: Index:
@@ -36,8 +36,8 @@
#DSOREL-NEXT: SHF_ALLOC
#DSOREL-NEXT: SHF_WRITE
#DSOREL-NEXT: ]
-#DSOREL-NEXT: Address: 0x3000
-#DSOREL-NEXT: Offset: 0x3000
+#DSOREL-NEXT: Address: 0x30000
+#DSOREL-NEXT: Offset: 0x30000
#DSOREL-NEXT: Size: 48
#DSOREL-NEXT: Link: 0
#DSOREL-NEXT: Info: 0
@@ -46,51 +46,51 @@
#DSOREL-NEXT: }
#DSOREL: Relocations [
#DSOREL-NEXT: Section ({{.*}}) .rela.plt {
-#DSOREL-NEXT: 0x3018 R_AARCH64_JUMP_SLOT _foo
-#DSOREL-NEXT: 0x3020 R_AARCH64_JUMP_SLOT _bar
-#DSOREL-NEXT: 0x3028 R_AARCH64_JUMP_SLOT _dah
+#DSOREL-NEXT: 0x30018 R_AARCH64_JUMP_SLOT _foo
+#DSOREL-NEXT: 0x30020 R_AARCH64_JUMP_SLOT _bar
+#DSOREL-NEXT: 0x30028 R_AARCH64_JUMP_SLOT _dah
#DSOREL-NEXT: }
#DSOREL-NEXT:]
#DSO: Disassembly of section .text:
#DSO-NEXT: _foo:
-#DSO-NEXT: 1000: {{.*}} nop
-#DSO-NEXT: 1004: {{.*}} nop
-#DSO-NEXT: 1008: {{.*}} nop
-#DSO-NEXT: 100c: {{.*}} nop
+#DSO-NEXT: 10000: {{.*}} nop
+#DSO-NEXT: 10004: {{.*}} nop
+#DSO-NEXT: 10008: {{.*}} nop
+#DSO-NEXT: 1000c: {{.*}} nop
#DSO: _bar:
-#DSO-NEXT: 1010: {{.*}} nop
-#DSO-NEXT: 1014: {{.*}} nop
-#DSO-NEXT: 1018: {{.*}} nop
+#DSO-NEXT: 10010: {{.*}} nop
+#DSO-NEXT: 10014: {{.*}} nop
+#DSO-NEXT: 10018: {{.*}} nop
#DSO: _dah:
-#DSO-NEXT: 101c: {{.*}} nop
-#DSO-NEXT: 1020: {{.*}} nop
+#DSO-NEXT: 1001c: {{.*}} nop
+#DSO-NEXT: 10020: {{.*}} nop
#DSO: _start:
-#DSO-NEXT: 1024: {{.*}} b.eq #44
-#DSO-NEXT: 1028: {{.*}} b.eq #56
-#DSO-NEXT: 102c: {{.*}} b.eq #68
+#DSO-NEXT: 10024: {{.*}} b.eq #44
+#DSO-NEXT: 10028: {{.*}} b.eq #56
+#DSO-NEXT: 1002c: {{.*}} b.eq #68
#DSO-NEXT: Disassembly of section .plt:
#DSO-NEXT: .plt:
-#DSO-NEXT: 1030: {{.*}} stp x16, x30, [sp, #-16]!
-#DSO-NEXT: 1034: {{.*}} adrp x16, #8192
-#DSO-NEXT: 1038: {{.*}} ldr x17, [x16, #16]
-#DSO-NEXT: 103c: {{.*}} add x16, x16, #16
-#DSO-NEXT: 1040: {{.*}} br x17
-#DSO-NEXT: 1044: {{.*}} nop
-#DSO-NEXT: 1048: {{.*}} nop
-#DSO-NEXT: 104c: {{.*}} nop
-#DSO-NEXT: 1050: {{.*}} adrp x16, #8192
-#DSO-NEXT: 1054: {{.*}} ldr x17, [x16, #24]
-#DSO-NEXT: 1058: {{.*}} add x16, x16, #24
-#DSO-NEXT: 105c: {{.*}} br x17
-#DSO-NEXT: 1060: {{.*}} adrp x16, #8192
-#DSO-NEXT: 1064: {{.*}} ldr x17, [x16, #32]
-#DSO-NEXT: 1068: {{.*}} add x16, x16, #32
-#DSO-NEXT: 106c: {{.*}} br x17
-#DSO-NEXT: 1070: {{.*}} adrp x16, #8192
-#DSO-NEXT: 1074: {{.*}} ldr x17, [x16, #40]
-#DSO-NEXT: 1078: {{.*}} add x16, x16, #40
-#DSO-NEXT: 107c: {{.*}} br x17
+#DSO-NEXT: 10030: {{.*}} stp x16, x30, [sp, #-16]!
+#DSO-NEXT: 10034: {{.*}} adrp x16, #131072
+#DSO-NEXT: 10038: {{.*}} ldr x17, [x16, #16]
+#DSO-NEXT: 1003c: {{.*}} add x16, x16, #16
+#DSO-NEXT: 10040: {{.*}} br x17
+#DSO-NEXT: 10044: {{.*}} nop
+#DSO-NEXT: 10048: {{.*}} nop
+#DSO-NEXT: 1004c: {{.*}} nop
+#DSO-NEXT: 10050: {{.*}} adrp x16, #131072
+#DSO-NEXT: 10054: {{.*}} ldr x17, [x16, #24]
+#DSO-NEXT: 10058: {{.*}} add x16, x16, #24
+#DSO-NEXT: 1005c: {{.*}} br x17
+#DSO-NEXT: 10060: {{.*}} adrp x16, #131072
+#DSO-NEXT: 10064: {{.*}} ldr x17, [x16, #32]
+#DSO-NEXT: 10068: {{.*}} add x16, x16, #32
+#DSO-NEXT: 1006c: {{.*}} br x17
+#DSO-NEXT: 10070: {{.*}} adrp x16, #131072
+#DSO-NEXT: 10074: {{.*}} ldr x17, [x16, #40]
+#DSO-NEXT: 10078: {{.*}} add x16, x16, #40
+#DSO-NEXT: 1007c: {{.*}} br x17
.globl _start
_start:
Modified: lld/trunk/test/ELF/aarch64-copy.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-copy.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-copy.s (original)
+++ lld/trunk/test/ELF/aarch64-copy.s Tue Oct 4 03:58:55 2016
@@ -22,7 +22,7 @@ _start:
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x13000
+// CHECK-NEXT: Address: 0x40000
// CHECK-NEXT: Offset:
// CHECK-NEXT: Size: 24
// CHECK-NEXT: Link:
@@ -32,19 +32,19 @@ _start:
// CHECK: Relocations [
// CHECK-NEXT: Section ({{.*}}) .rela.dyn {
// CHECK-NEXT: Relocation {
-// CHECK-NEXT: Offset: 0x13000
+// CHECK-NEXT: Offset: 0x40000
// CHECK-NEXT: Type: R_AARCH64_COPY
// CHECK-NEXT: Symbol: x
// CHECK-NEXT: Addend: 0x0
// CHECK-NEXT: }
// CHECK-NEXT: Relocation {
-// CHECK-NEXT: Offset: 0x13010
+// CHECK-NEXT: Offset: 0x40010
// CHECK-NEXT: Type: R_AARCH64_COPY
// CHECK-NEXT: Symbol: y
// CHECK-NEXT: Addend: 0x0
// CHECK-NEXT: }
// CHECK-NEXT: Relocation {
-// CHECK-NEXT: Offset: 0x13014
+// CHECK-NEXT: Offset: 0x40014
// CHECK-NEXT: Type: R_AARCH64_COPY
// CHECK-NEXT: Symbol: z
// CHECK-NEXT: Addend: 0x0
@@ -54,21 +54,21 @@ _start:
// CHECK: Symbols [
// CHECK: Name: x
-// CHECK-NEXT: Value: 0x13000
+// CHECK-NEXT: Value: 0x40000
// CHECK-NEXT: Size: 4
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
// CHECK-NEXT: Other:
// CHECK-NEXT: Section: .bss
// CHECK: Name: y
-// CHECK-NEXT: Value: 0x13010
+// CHECK-NEXT: Value: 0x40010
// CHECK-NEXT: Size: 4
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
// CHECK-NEXT: Other:
// CHECK-NEXT: Section: .bss
// CHECK: Name: z
-// CHECK-NEXT: Value: 0x13014
+// CHECK-NEXT: Value: 0x40014
// CHECK-NEXT: Size: 4
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Object
@@ -78,16 +78,16 @@ _start:
// CODE: Disassembly of section .text:
// CODE-NEXT: _start:
-// S(x) = 0x13000, A = 0, P = 0x11000
-// S + A - P = 0x2000 = 8208
-// CODE-NEXT: 11000: {{.*}} adr x1, #8192
-// S(y) = 0x13010, A = 0, P = 0x11004
-// Page(S + A) - Page(P) = 0x13000 - 0x11000 = 0x2000 = 8192
-// CODE-NEXT: 11004: {{.*}} adrp x2, #8192
-// S(y) = 0x13010, A = 0
+// S(x) = 0x40000, A = 0, P = 0x20000
+// S + A - P = 0x20000 = 131072
+// CODE-NEXT: 20000: {{.*}} adr x1, #131072
+// S(y) = 0x40010, A = 0, P = 0x20004
+// Page(S + A) - Page(P) = 0x40000 - 0x20000 = 0x20000 = 131072
+// CODE-NEXT: 20004: {{.*}} adrp x2, #131072
+// S(y) = 0x40010, A = 0
// (S + A) & 0xFFF = 0x10 = 16
-// CODE-NEXT: 11008: {{.*}} add x2, x2, #16
+// CODE-NEXT: 20008: {{.*}} add x2, x2, #16
// RODATA: Contents of section .rodata:
-// S(z) = 0x13014
-// RODATA-NEXT: 101c8 14300100
+// S(z) = 0x40014
+// RODATA-NEXT: 101c8 14000400
Modified: lld/trunk/test/ELF/aarch64-copy2.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-copy2.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-copy2.s (original)
+++ lld/trunk/test/ELF/aarch64-copy2.s Tue Oct 4 03:58:55 2016
@@ -19,7 +19,7 @@ _start:
// CHECK-NEXT: Section: Undefined
// CHECK: Name: foo
-// CHECK-NEXT: Value: 0x11030
+// CHECK-NEXT: Value: 0x20030
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: Function
Modified: lld/trunk/test/ELF/aarch64-data-relocs.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-data-relocs.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-data-relocs.s (original)
+++ lld/trunk/test/ELF/aarch64-data-relocs.s Tue Oct 4 03:58:55 2016
@@ -12,12 +12,12 @@ _start:
// S = 0x100, A = 0x24
// S + A = 0x124
// CHECK: Contents of section .R_AARCH64_ABS64:
-// CHECK-NEXT: 11000 24010000 00000000
+// CHECK-NEXT: 20000 24010000 00000000
.section .R_AARCH64_PREL64, "ax", at progbits
.xword foo - . + 0x24
-// S = 0x100, A = 0x24, P = 0x11008
-// S + A - P = 0xfffffffffffef11c
+// S = 0x100, A = 0x24, P = 0x20008
+// S + A - P = 0xfffffffffffe011c
// CHECK: Contents of section .R_AARCH64_PREL64:
-// CHECK-NEXT: 11008 1cf1feff ffffffff
+// CHECK-NEXT: 20008 1c01feff ffffffff
Modified: lld/trunk/test/ELF/aarch64-gnu-ifunc.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-gnu-ifunc.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-gnu-ifunc.s (original)
+++ lld/trunk/test/ELF/aarch64-gnu-ifunc.s Tue Oct 4 03:58:55 2016
@@ -22,8 +22,8 @@
// CHECK-NEXT: }
// CHECK: Relocations [
// CHECK-NEXT: Section ({{.*}}) .rela.plt {
-// CHECK-NEXT: 0x12018 R_AARCH64_IRELATIVE
-// CHECK-NEXT: 0x12020 R_AARCH64_IRELATIVE
+// CHECK-NEXT: 0x30018 R_AARCH64_IRELATIVE
+// CHECK-NEXT: 0x30020 R_AARCH64_IRELATIVE
// CHECK-NEXT: }
// CHECK-NEXT: ]
// CHECK: Symbols [
@@ -38,7 +38,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: $x.0
-// CHECK-NEXT: Value: 0x11000
+// CHECK-NEXT: Value: 0x20000
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Local
// CHECK-NEXT: Type: None
@@ -69,7 +69,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: _start
-// CHECK-NEXT: Value: 0x11008
+// CHECK-NEXT: Value: 0x20008
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: None
@@ -78,7 +78,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: bar
-// CHECK-NEXT: Value: 0x11004
+// CHECK-NEXT: Value: 0x20004
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: GNU_IFunc
@@ -87,7 +87,7 @@
// CHECK-NEXT: }
// CHECK-NEXT: Symbol {
// CHECK-NEXT: Name: foo
-// CHECK-NEXT: Value: 0x11000
+// CHECK-NEXT: Value: 0x20000
// CHECK-NEXT: Size: 0
// CHECK-NEXT: Binding: Global
// CHECK-NEXT: Type: GNU_IFunc
@@ -100,32 +100,32 @@
// 392 = 0x188
// DISASM: Disassembly of section .text:
// DISASM-NEXT: foo:
-// DISASM-NEXT: 11000: c0 03 5f d6 ret
+// DISASM-NEXT: 20000: c0 03 5f d6 ret
// DISASM: bar:
-// DISASM-NEXT: 11004: c0 03 5f d6 ret
+// DISASM-NEXT: 20004: c0 03 5f d6 ret
// DISASM: _start:
-// DISASM-NEXT: 11008: 0e 00 00 94 bl #56
-// DISASM-NEXT: 1100c: 11 00 00 94 bl #68
-// DISASM-NEXT: 11010: 42 60 05 91 add x2, x2, #344
-// DISASM-NEXT: 11014: 42 20 06 91 add x2, x2, #392
+// DISASM-NEXT: 20008: 0e 00 00 94 bl #56
+// DISASM-NEXT: 2000c: 11 00 00 94 bl #68
+// DISASM-NEXT: 20010: 42 60 05 91 add x2, x2, #344
+// DISASM-NEXT: 20014: 42 20 06 91 add x2, x2, #392
// DISASM-NEXT: Disassembly of section .plt:
// DISASM-NEXT: .plt:
-// DISASM-NEXT: 11020: f0 7b bf a9 stp x16, x30, [sp, #-16]!
-// DISASM-NEXT: 11024: 10 00 00 b0 adrp x16, #4096
-// DISASM-NEXT: 11028: 11 0a 40 f9 ldr x17, [x16, #16]
-// DISASM-NEXT: 1102c: 10 42 00 91 add x16, x16, #16
-// DISASM-NEXT: 11030: 20 02 1f d6 br x17
-// DISASM-NEXT: 11034: 1f 20 03 d5 nop
-// DISASM-NEXT: 11038: 1f 20 03 d5 nop
-// DISASM-NEXT: 1103c: 1f 20 03 d5 nop
-// DISASM-NEXT: 11040: 10 00 00 b0 adrp x16, #4096
-// DISASM-NEXT: 11044: 11 0e 40 f9 ldr x17, [x16, #24]
-// DISASM-NEXT: 11048: 10 62 00 91 add x16, x16, #24
-// DISASM-NEXT: 1104c: 20 02 1f d6 br x17
-// DISASM-NEXT: 11050: 10 00 00 b0 adrp x16, #4096
-// DISASM-NEXT: 11054: 11 12 40 f9 ldr x17, [x16, #32]
-// DISASM-NEXT: 11058: 10 82 00 91 add x16, x16, #32
-// DISASM-NEXT: 1105c: 20 02 1f d6 br x17
+// DISASM-NEXT: 20020: f0 7b bf a9 stp x16, x30, [sp, #-16]!
+// DISASM-NEXT: 20024: 90 00 00 90 adrp x16, #65536
+// DISASM-NEXT: 20028: 11 0a 40 f9 ldr x17, [x16, #16]
+// DISASM-NEXT: 2002c: 10 42 00 91 add x16, x16, #16
+// DISASM-NEXT: 20030: 20 02 1f d6 br x17
+// DISASM-NEXT: 20034: 1f 20 03 d5 nop
+// DISASM-NEXT: 20038: 1f 20 03 d5 nop
+// DISASM-NEXT: 2003c: 1f 20 03 d5 nop
+// DISASM-NEXT: 20040: 90 00 00 90 adrp x16, #65536
+// DISASM-NEXT: 20044: 11 0e 40 f9 ldr x17, [x16, #24]
+// DISASM-NEXT: 20048: 10 62 00 91 add x16, x16, #24
+// DISASM-NEXT: 2004c: 20 02 1f d6 br x17
+// DISASM-NEXT: 20050: 90 00 00 90 adrp x16, #65536
+// DISASM-NEXT: 20054: 11 12 40 f9 ldr x17, [x16, #32]
+// DISASM-NEXT: 20058: 10 82 00 91 add x16, x16, #32
+// DISASM-NEXT: 2005c: 20 02 1f d6 br x17
.text
.type foo STT_GNU_IFUNC
Modified: lld/trunk/test/ELF/aarch64-prel16.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-prel16.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-prel16.s (original)
+++ lld/trunk/test/ELF/aarch64-prel16.s Tue Oct 4 03:58:55 2016
@@ -14,7 +14,7 @@ _start:
// the change of the address of the .data section.
// You may found the correct address in the aarch64_abs16.s test,
// if it is already fixed. Then, update addends accordingly.
-// RUN: ld.lld %t.o %t256.o -o %t2
+// RUN: ld.lld -z max-page-size=4096 %t.o %t256.o -o %t2
// RUN: llvm-objdump -s -section=.data %t2 | FileCheck %s
// CHECK: Contents of section .data:
Modified: lld/trunk/test/ELF/aarch64-prel32.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-prel32.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-prel32.s (original)
+++ lld/trunk/test/ELF/aarch64-prel32.s Tue Oct 4 03:58:55 2016
@@ -14,7 +14,7 @@ _start:
// the change of the address of the .data section.
// You may found the correct address in the aarch64_abs32.s test,
// if it is already fixed. Then, update addends accordingly.
-// RUN: ld.lld %t.o %t256.o -o %t2
+// RUN: ld.lld -z max-page-size=4096 %t.o %t256.o -o %t2
// RUN: llvm-objdump -s -section=.data %t2 | FileCheck %s
// CHECK: Contents of section .data:
Modified: lld/trunk/test/ELF/aarch64-relocs.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-relocs.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-relocs.s (original)
+++ lld/trunk/test/ELF/aarch64-relocs.s Tue Oct 4 03:58:55 2016
@@ -24,13 +24,13 @@ mystr:
.asciz "blah"
.size mystr, 4
-# S = 0x11012, A = 0x4, P = 0x11012
+# S = 0x20012, A = 0x4, P = 0x20012
# PAGE(S + A) = 0x11000
# PAGE(P) = 0x11000
#
# CHECK: Disassembly of section .R_AARCH64_ADR_PREL_PG_H121:
# CHECK-NEXT: $x.2:
-# CHECK-NEXT: 11012: 01 00 00 90 adrp x1, #0
+# CHECK-NEXT: 20012: 01 00 00 90 adrp x1, #0
.section .R_AARCH64_ADD_ABS_LO12_NC,"ax", at progbits
add x0, x0, :lo12:.L.str
@@ -38,13 +38,13 @@ mystr:
.asciz "blah"
.size mystr, 4
-# S = 0x1101b, A = 0x4
+# S = 0x2001b, A = 0x4
# R = (S + A) & 0xFFF = 0x1f
# R << 10 = 0x7c00
#
# CHECK: Disassembly of section .R_AARCH64_ADD_ABS_LO12_NC:
# CHECK-NEXT: $x.4:
-# CHECK-NEXT: 1101b: 00 7c 00 91 add x0, x0, #31
+# CHECK-NEXT: 2001b: 00 7c 00 91 add x0, x0, #31
.section .R_AARCH64_LDST64_ABS_LO12_NC,"ax", at progbits
ldr x28, [x27, :lo12:foo]
@@ -52,12 +52,12 @@ foo:
.asciz "foo"
.size mystr, 3
-# S = 0x11024, A = 0x4
+# S = 0x20024, A = 0x4
# R = ((S + A) & 0xFFF) << 7 = 0x00001400
# 0x00001400 | 0xf940177c = 0xf940177c
# CHECK: Disassembly of section .R_AARCH64_LDST64_ABS_LO12_NC:
# CHECK-NEXT: $x.6:
-# CHECK-NEXT: 11024: 7c 17 40 f9 ldr x28, [x27, #40]
+# CHECK-NEXT: 20024: 7c 17 40 f9 ldr x28, [x27, #40]
.section .SUB,"ax", at progbits
nop
@@ -66,33 +66,33 @@ sub:
# CHECK: Disassembly of section .SUB:
# CHECK-NEXT: $x.8:
-# CHECK-NEXT: 1102c: 1f 20 03 d5 nop
+# CHECK-NEXT: 2002c: 1f 20 03 d5 nop
# CHECK: sub:
-# CHECK-NEXT: 11030: 1f 20 03 d5 nop
+# CHECK-NEXT: 20030: 1f 20 03 d5 nop
.section .R_AARCH64_CALL26,"ax", at progbits
call26:
bl sub
-# S = 0x1102c, A = 0x4, P = 0x11034
+# S = 0x2002c, A = 0x4, P = 0x20034
# R = S + A - P = -0x4 = 0xfffffffc
# (R & 0x0ffffffc) >> 2 = 0x03ffffff
# 0x94000000 | 0x03ffffff = 0x97ffffff
# CHECK: Disassembly of section .R_AARCH64_CALL26:
# CHECK-NEXT: call26:
-# CHECK-NEXT: 11034: ff ff ff 97 bl #-4
+# CHECK-NEXT: 20034: ff ff ff 97 bl #-4
.section .R_AARCH64_JUMP26,"ax", at progbits
jump26:
b sub
-# S = 0x1102c, A = 0x4, P = 0x11038
+# S = 0x2002c, A = 0x4, P = 0x20038
# R = S + A - P = -0x8 = 0xfffffff8
# (R & 0x0ffffffc) >> 2 = 0x03fffffe
# 0x14000000 | 0x03fffffe = 0x17fffffe
# CHECK: Disassembly of section .R_AARCH64_JUMP26:
# CHECK-NEXT: jump26:
-# CHECK-NEXT: 11038: fe ff ff 17 b #-8
+# CHECK-NEXT: 20038: fe ff ff 17 b #-8
.section .R_AARCH64_LDST32_ABS_LO12_NC,"ax", at progbits
ldst32:
@@ -101,12 +101,12 @@ foo32:
.asciz "foo"
.size mystr, 3
-# S = 0x1103c, A = 0x4
+# S = 0x2003c, A = 0x4
# R = ((S + A) & 0xFFC) << 8 = 0x00004000
# 0x00004000 | 0xbd4000a4 = 0xbd4040a4
# CHECK: Disassembly of section .R_AARCH64_LDST32_ABS_LO12_NC:
# CHECK-NEXT: ldst32:
-# CHECK-NEXT: 1103c: a4 40 40 bd ldr s4, [x5, #64]
+# CHECK-NEXT: 2003c: a4 40 40 bd ldr s4, [x5, #64]
.section .R_AARCH64_LDST8_ABS_LO12_NC,"ax", at progbits
ldst8:
@@ -115,12 +115,12 @@ foo8:
.asciz "foo"
.size mystr, 3
-# S = 0x11044, A = 0x4
+# S = 0x20044, A = 0x4
# R = ((S + A) & 0xFFF) << 10 = 0x00012000
# 0x00012000 | 0x398001ab = 0x398121ab
# CHECK: Disassembly of section .R_AARCH64_LDST8_ABS_LO12_NC:
# CHECK-NEXT: ldst8:
-# CHECK-NEXT: 11044: ab 21 81 39 ldrsb x11, [x13, #72]
+# CHECK-NEXT: 20044: ab 21 81 39 ldrsb x11, [x13, #72]
.section .R_AARCH64_LDST128_ABS_LO12_NC,"ax", at progbits
ldst128:
@@ -129,14 +129,14 @@ foo128:
.asciz "foo"
.size mystr, 3
-# S = 0x1104c, A = 0x4
+# S = 0x2004c, A = 0x4
# R = ((S + A) & 0xFF8) << 6 = 0x00001400
# 0x00001400 | 0x3dc00274 = 0x3dc01674
# CHECK: Disassembly of section .R_AARCH64_LDST128_ABS_LO12_NC:
# CHECK: ldst128:
-# CHECK: 1104c: 74 16 c0 3d ldr q20, [x19, #80]
+# CHECK: 2004c: 74 16 c0 3d ldr q20, [x19, #80]
#foo128:
-# 11050: 66 6f 6f 00 .word
+# 20050: 66 6f 6f 00 .word
.section .R_AARCH64_LDST16_ABS_LO12_NC,"ax", at progbits
ldst16:
@@ -145,12 +145,12 @@ foo16:
.asciz "foo"
.size mystr, 3
-# S = 0x11054, A = 0x4
+# S = 0x20054, A = 0x4
# R = ((S + A) & 0x0FFC) << 9 = 0xb000
# 0xb000 | 0x7d400271 = 0x7d40b271
# CHECK: Disassembly of section .R_AARCH64_LDST16_ABS_LO12_NC:
# CHECK-NEXT: ldst16:
-# CHECK-NEXT: 11054: 71 b2 40 7d ldr h17, [x19, #88]
+# CHECK-NEXT: 20054: 71 b2 40 7d ldr h17, [x19, #88]
.section .R_AARCH64_MOVW_UABS,"ax", at progbits
movz1:
Modified: lld/trunk/test/ELF/aarch64-tls-gdie.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tls-gdie.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tls-gdie.s (original)
+++ lld/trunk/test/ELF/aarch64-tls-gdie.s Tue Oct 4 03:58:55 2016
@@ -21,14 +21,14 @@ _start:
// SEC-NEXT: SHF_ALLOC
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x120B0
+// SEC-NEXT: Address: 0x300B0
-// page(0x120B0) - page(0x11004) = 4096
+// page(0x300B0) - page(0x20004) = 65536
// 0x0B0 = 176
// CHECK: _start:
-// CHECK-NEXT: 11000: {{.*}} nop
-// CHECK-NEXT: 11004: {{.*}} adrp x0, #4096
-// CHECK-NEXT: 11008: {{.*}} ldr x0, [x0, #176]
-// CHECK-NEXT: 1100c: {{.*}} nop
-// CHECK-NEXT: 11010: {{.*}} nop
+// CHECK-NEXT: 20000: {{.*}} nop
+// CHECK-NEXT: 20004: {{.*}} adrp x0, #65536
+// CHECK-NEXT: 20008: {{.*}} ldr x0, [x0, #176]
+// CHECK-NEXT: 2000c: {{.*}} nop
+// CHECK-NEXT: 20010: {{.*}} nop
Modified: lld/trunk/test/ELF/aarch64-tls-gdle.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tls-gdle.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tls-gdle.s (original)
+++ lld/trunk/test/ELF/aarch64-tls-gdle.s Tue Oct 4 03:58:55 2016
@@ -12,10 +12,10 @@
# TCB size = 0x16 and foo is first element from TLS register.
# CHECK: Disassembly of section .text:
# CHECK: _start:
-# CHECK: 11000: 00 00 a0 d2 movz x0, #0, lsl #16
-# CHECK: 11004: 00 02 80 f2 movk x0, #16
-# CHECK: 11008: 1f 20 03 d5 nop
-# CHECK: 1100c: 1f 20 03 d5 nop
+# CHECK: 20000: 00 00 a0 d2 movz x0, #0, lsl #16
+# CHECK: 20004: 00 02 80 f2 movk x0, #16
+# CHECK: 20008: 1f 20 03 d5 nop
+# CHECK: 2000c: 1f 20 03 d5 nop
.globl _start
_start:
Modified: lld/trunk/test/ELF/aarch64-tls-ie.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tls-ie.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tls-ie.s (original)
+++ lld/trunk/test/ELF/aarch64-tls-ie.s Tue Oct 4 03:58:55 2016
@@ -15,8 +15,8 @@
#RELOC-NEXT: SHF_ALLOC
#RELOC-NEXT: SHF_WRITE
#RELOC-NEXT: ]
-#RELOC-NEXT: Address: 0x120B0
-#RELOC-NEXT: Offset: 0x20B0
+#RELOC-NEXT: Address: 0x300B0
+#RELOC-NEXT: Offset: 0x200B0
#RELOC-NEXT: Size: 16
#RELOC-NEXT: Link: 0
#RELOC-NEXT: Info: 0
@@ -25,21 +25,21 @@
#RELOC-NEXT: }
#RELOC: Relocations [
#RELOC-NEXT: Section ({{.*}}) .rela.dyn {
-#RELOC-NEXT: 0x120B8 R_AARCH64_TLS_TPREL64 bar 0x0
-#RELOC-NEXT: 0x120B0 R_AARCH64_TLS_TPREL64 foo 0x0
+#RELOC-NEXT: 0x300B8 R_AARCH64_TLS_TPREL64 bar 0x0
+#RELOC-NEXT: 0x300B0 R_AARCH64_TLS_TPREL64 foo 0x0
#RELOC-NEXT: }
#RELOC-NEXT:]
-# Page(0x120B0) - Page(0x11000) = 0x1000 = 4096
-# 0x120B0 & 0xff8 = 0xB0 = 176
-# Page(0x120B8) - Page(0x11000) = 0x1000 = 4096
-# 0x120B8 & 0xff8 = 0xB8 = 184
+# Page(0x300B0) - Page(0x20000) = 0x10000 = 65536
+# 0x300B0 & 0xff8 = 0xB0 = 176
+# Page(0x300B8) - Page(0x20000) = 0x10000 = 65536
+# 0x300B8 & 0xff8 = 0xB8 = 184
#CHECK: Disassembly of section .text:
#CHECK: _start:
-#CHECK: 11000: 00 00 00 b0 adrp x0, #4096
-#CHECK: 11004: 00 58 40 f9 ldr x0, [x0, #176]
-#CHECK: 11008: 00 00 00 b0 adrp x0, #4096
-#CHECK: 1100c: 00 5c 40 f9 ldr x0, [x0, #184]
+#CHECK: 20000: 80 00 00 90 adrp x0, #65536
+#CHECK: 20004: 00 58 40 f9 ldr x0, [x0, #176]
+#CHECK: 20008: 80 00 00 90 adrp x0, #65536
+#CHECK: 2000c: 00 5c 40 f9 ldr x0, [x0, #184]
.globl _start
_start:
Modified: lld/trunk/test/ELF/aarch64-tls-iele.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tls-iele.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tls-iele.s (original)
+++ lld/trunk/test/ELF/aarch64-tls-iele.s Tue Oct 4 03:58:55 2016
@@ -12,10 +12,10 @@
# TCB size = 0x16 and foo is first element from TLS register.
# CHECK: Disassembly of section .text:
# CHECK: _start:
-# CHECK-NEXT: 11000: 00 00 a0 d2 movz x0, #0, lsl #16
-# CHECK-NEXT: 11004: 80 02 80 f2 movk x0, #20
-# CHECK-NEXT: 11008: 00 00 a0 d2 movz x0, #0, lsl #16
-# CHECK-NEXT: 1100c: 00 02 80 f2 movk x0, #16
+# CHECK-NEXT: 20000: 00 00 a0 d2 movz x0, #0, lsl #16
+# CHECK-NEXT: 20004: 80 02 80 f2 movk x0, #20
+# CHECK-NEXT: 20008: 00 00 a0 d2 movz x0, #0, lsl #16
+# CHECK-NEXT: 2000c: 00 02 80 f2 movk x0, #16
.section .tdata
.align 2
Modified: lld/trunk/test/ELF/aarch64-tls-le.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tls-le.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tls-le.s (original)
+++ lld/trunk/test/ELF/aarch64-tls-le.s Tue Oct 4 03:58:55 2016
@@ -17,9 +17,9 @@ _start:
# TCB size = 0x16 and foo is first element from TLS register.
#CHECK: Disassembly of section .text:
#CHECK: _start:
-#CHECK: 11000: 40 d0 3b d5 mrs x0, TPIDR_EL0
-#CHECK: 11004: 00 00 40 91 add x0, x0, #0, lsl #12
-#CHECK: 11008: 00 40 00 91 add x0, x0, #16
+#CHECK: 20000: 40 d0 3b d5 mrs x0, TPIDR_EL0
+#CHECK: 20004: 00 00 40 91 add x0, x0, #0, lsl #12
+#CHECK: 20008: 00 40 00 91 add x0, x0, #16
.type v1, at object
.section .tbss,"awT", at nobits
Modified: lld/trunk/test/ELF/aarch64-tls-static.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tls-static.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tls-static.s (original)
+++ lld/trunk/test/ELF/aarch64-tls-static.s Tue Oct 4 03:58:55 2016
@@ -23,15 +23,15 @@ bar:
// SEC-NEXT: SHF_ALLOC
// SEC-NEXT: SHF_WRITE
// SEC-NEXT: ]
-// SEC-NEXT: Address: 0x2098
-// SEC-NEXT: Offset: 0x2098
+// SEC-NEXT: Address: 0x20098
+// SEC-NEXT: Offset: 0x20098
// SEC-NEXT: Size: 16
-// page(0x2098) - page(0x1000) = 4096
+// page(0x20098) - page(0x10000) = 65536
// 0x98 = 152
// CHECK: foo:
-// CHECK-NEXT: 1000: {{.*}} adrp x0, #4096
-// CHECK-NEXT: 1004: {{.*}} ldr x1, [x0, #152]
-// CHECK-NEXT: 1008: {{.*}} add x0, x0, #152
-// CHECK-NEXT: 100c: {{.*}} blr x1
+// CHECK-NEXT: 10000: {{.*}} adrp x0, #65536
+// CHECK-NEXT: 10004: {{.*}} ldr x1, [x0, #152]
+// CHECK-NEXT: 10008: {{.*}} add x0, x0, #152
+// CHECK-NEXT: 1000c: {{.*}} blr x1
Modified: lld/trunk/test/ELF/aarch64-tlsdesc.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tlsdesc.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tlsdesc.s (original)
+++ lld/trunk/test/ELF/aarch64-tlsdesc.s Tue Oct 4 03:58:55 2016
@@ -10,15 +10,15 @@
.tlsdesccall a
blr x1
-// CHECK: 1000: {{.*}} adrp x0, #4096
-// CHECK-NEXT: 1004: {{.*}} ldr x1, [x0, #144]
-// CHECK-NEXT: 1008: {{.*}} add x0, x0, #144
-// CHECK-NEXT: 100c: {{.*}} blr x1
+// CHECK: 10000: {{.*}} adrp x0, #65536
+// CHECK-NEXT: 10004: {{.*}} ldr x1, [x0, #144]
+// CHECK-NEXT: 10008: {{.*}} add x0, x0, #144
+// CHECK-NEXT: 1000c: {{.*}} blr x1
// 0x1000 + 4096 + 144 = 0x2090
// REL: Relocations [
// REL-NEXT: Section (4) .rela.dyn {
-// REL-NEXT: 0x2090 R_AARCH64_TLSDESC a 0x0
+// REL-NEXT: 0x20090 R_AARCH64_TLSDESC a 0x0
// REL-NEXT: }
// REL-NEXT: ]
Modified: lld/trunk/test/ELF/aarch64-tstbr14-reloc.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-tstbr14-reloc.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/aarch64-tstbr14-reloc.s (original)
+++ lld/trunk/test/ELF/aarch64-tstbr14-reloc.s Tue Oct 4 03:58:55 2016
@@ -7,25 +7,25 @@
# RUN: llvm-readobj -s -r %t3 | FileCheck -check-prefix=DSOREL %s
# REQUIRES: aarch64
-# 0x1101c - 28 = 0x11000
-# 0x11020 - 16 = 0x11010
-# 0x11024 - 36 = 0x11000
-# 0x11028 - 24 = 0x11010
+# 0x1101c - 28 = 0x20000
+# 0x11020 - 16 = 0x20010
+# 0x11024 - 36 = 0x20000
+# 0x11028 - 24 = 0x20010
# CHECK: Disassembly of section .text:
# CHECK-NEXT: _foo:
-# CHECK-NEXT: 11000: {{.*}} nop
-# CHECK-NEXT: 11004: {{.*}} nop
-# CHECK-NEXT: 11008: {{.*}} nop
-# CHECK-NEXT: 1100c: {{.*}} nop
+# CHECK-NEXT: 20000: {{.*}} nop
+# CHECK-NEXT: 20004: {{.*}} nop
+# CHECK-NEXT: 20008: {{.*}} nop
+# CHECK-NEXT: 2000c: {{.*}} nop
# CHECK: _bar:
-# CHECK-NEXT: 11010: {{.*}} nop
-# CHECK-NEXT: 11014: {{.*}} nop
-# CHECK-NEXT: 11018: {{.*}} nop
+# CHECK-NEXT: 20010: {{.*}} nop
+# CHECK-NEXT: 20014: {{.*}} nop
+# CHECK-NEXT: 20018: {{.*}} nop
# CHECK: _start:
-# CHECK-NEXT: 1101c: {{.*}} tbnz w3, #15, #-28
-# CHECK-NEXT: 11020: {{.*}} tbnz w3, #15, #-16
-# CHECK-NEXT: 11024: {{.*}} tbz x6, #45, #-36
-# CHECK-NEXT: 11028: {{.*}} tbz x6, #45, #-24
+# CHECK-NEXT: 2001c: {{.*}} tbnz w3, #15, #-28
+# CHECK-NEXT: 20020: {{.*}} tbnz w3, #15, #-16
+# CHECK-NEXT: 20024: {{.*}} tbz x6, #45, #-36
+# CHECK-NEXT: 20028: {{.*}} tbz x6, #45, #-24
#DSOREL: Section {
#DSOREL: Index:
@@ -35,8 +35,8 @@
#DSOREL-NEXT: SHF_ALLOC
#DSOREL-NEXT: SHF_WRITE
#DSOREL-NEXT: ]
-#DSOREL-NEXT: Address: 0x3000
-#DSOREL-NEXT: Offset: 0x3000
+#DSOREL-NEXT: Address: 0x30000
+#DSOREL-NEXT: Offset: 0x30000
#DSOREL-NEXT: Size: 40
#DSOREL-NEXT: Link: 0
#DSOREL-NEXT: Info: 0
@@ -45,48 +45,48 @@
#DSOREL-NEXT: }
#DSOREL: Relocations [
#DSOREL-NEXT: Section ({{.*}}) .rela.plt {
-#DSOREL-NEXT: 0x3018 R_AARCH64_JUMP_SLOT _foo
-#DSOREL-NEXT: 0x3020 R_AARCH64_JUMP_SLOT _bar
+#DSOREL-NEXT: 0x30018 R_AARCH64_JUMP_SLOT _foo
+#DSOREL-NEXT: 0x30020 R_AARCH64_JUMP_SLOT _bar
#DSOREL-NEXT: }
#DSOREL-NEXT:]
#DSO: Disassembly of section .text:
#DSO-NEXT: _foo:
-#DSO-NEXT: 1000: {{.*}} nop
-#DSO-NEXT: 1004: {{.*}} nop
-#DSO-NEXT: 1008: {{.*}} nop
-#DSO-NEXT: 100c: {{.*}} nop
+#DSO-NEXT: 10000: {{.*}} nop
+#DSO-NEXT: 10004: {{.*}} nop
+#DSO-NEXT: 10008: {{.*}} nop
+#DSO-NEXT: 1000c: {{.*}} nop
#DSO: _bar:
-#DSO-NEXT: 1010: {{.*}} nop
-#DSO-NEXT: 1014: {{.*}} nop
-#DSO-NEXT: 1018: {{.*}} nop
+#DSO-NEXT: 10010: {{.*}} nop
+#DSO-NEXT: 10014: {{.*}} nop
+#DSO-NEXT: 10018: {{.*}} nop
#DSO: _start:
-# 0x101c + 52 = 0x1050 = PLT[1]
-# 0x1020 + 64 = 0x1060 = PLT[2]
-# 0x1024 + 44 = 0x1050 = PLT[1]
-# 0x1028 + 56 = 0x1060 = PLT[2]
-#DSO-NEXT: 101c: {{.*}} tbnz w3, #15, #52
-#DSO-NEXT: 1020: {{.*}} tbnz w3, #15, #64
-#DSO-NEXT: 1024: {{.*}} tbz x6, #45, #44
-#DSO-NEXT: 1028: {{.*}} tbz x6, #45, #56
+# 0x1001c + 52 = 0x10050 = PLT[1]
+# 0x10020 + 64 = 0x10060 = PLT[2]
+# 0x10024 + 44 = 0x10050 = PLT[1]
+# 0x10028 + 56 = 0x10060 = PLT[2]
+#DSO-NEXT: 1001c: {{.*}} tbnz w3, #15, #52
+#DSO-NEXT: 10020: {{.*}} tbnz w3, #15, #64
+#DSO-NEXT: 10024: {{.*}} tbz x6, #45, #44
+#DSO-NEXT: 10028: {{.*}} tbz x6, #45, #56
#DSO-NEXT: Disassembly of section .plt:
#DSO-NEXT: .plt:
-#DSO-NEXT: 1030: {{.*}} stp x16, x30, [sp, #-16]!
-#DSO-NEXT: 1034: {{.*}} adrp x16, #8192
-#DSO-NEXT: 1038: {{.*}} ldr x17, [x16, #16]
-#DSO-NEXT: 103c: {{.*}} add x16, x16, #16
-#DSO-NEXT: 1040: {{.*}} br x17
-#DSO-NEXT: 1044: {{.*}} nop
-#DSO-NEXT: 1048: {{.*}} nop
-#DSO-NEXT: 104c: {{.*}} nop
-#DSO-NEXT: 1050: {{.*}} adrp x16, #8192
-#DSO-NEXT: 1054: {{.*}} ldr x17, [x16, #24]
-#DSO-NEXT: 1058: {{.*}} add x16, x16, #24
-#DSO-NEXT: 105c: {{.*}} br x17
-#DSO-NEXT: 1060: {{.*}} adrp x16, #8192
-#DSO-NEXT: 1064: {{.*}} ldr x17, [x16, #32]
-#DSO-NEXT: 1068: {{.*}} add x16, x16, #32
-#DSO-NEXT: 106c: {{.*}} br x17
+#DSO-NEXT: 10030: {{.*}} stp x16, x30, [sp, #-16]!
+#DSO-NEXT: 10034: {{.*}} adrp x16, #131072
+#DSO-NEXT: 10038: {{.*}} ldr x17, [x16, #16]
+#DSO-NEXT: 1003c: {{.*}} add x16, x16, #16
+#DSO-NEXT: 10040: {{.*}} br x17
+#DSO-NEXT: 10044: {{.*}} nop
+#DSO-NEXT: 10048: {{.*}} nop
+#DSO-NEXT: 1004c: {{.*}} nop
+#DSO-NEXT: 10050: {{.*}} adrp x16, #131072
+#DSO-NEXT: 10054: {{.*}} ldr x17, [x16, #24]
+#DSO-NEXT: 10058: {{.*}} add x16, x16, #24
+#DSO-NEXT: 1005c: {{.*}} br x17
+#DSO-NEXT: 10060: {{.*}} adrp x16, #131072
+#DSO-NEXT: 10064: {{.*}} ldr x17, [x16, #32]
+#DSO-NEXT: 10068: {{.*}} add x16, x16, #32
+#DSO-NEXT: 1006c: {{.*}} br x17
.globl _start
_start:
Modified: lld/trunk/test/ELF/basic-aarch64.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/basic-aarch64.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/basic-aarch64.s (original)
+++ lld/trunk/test/ELF/basic-aarch64.s Tue Oct 4 03:58:55 2016
@@ -26,7 +26,7 @@ _start:
# CHECK-NEXT: Version: 1
# CHECK-NEXT: Entry: [[ENTRY:0x[0-9A-F]+]]
# CHECK-NEXT: ProgramHeaderOffset: 0x40
-# CHECK-NEXT: SectionHeaderOffset: 0x1088
+# CHECK-NEXT: SectionHeaderOffset: 0x10088
# CHECK-NEXT: Flags [ (0x0)
# CHECK-NEXT: ]
# CHECK-NEXT: HeaderSize: 64
@@ -59,8 +59,8 @@ _start:
# CHECK-NEXT: SHF_ALLOC (0x2)
# CHECK-NEXT: SHF_EXECINSTR (0x4)
# CHECK-NEXT: ]
-# CHECK-NEXT: Address: 0x11000
-# CHECK-NEXT: Offset: 0x1000
+# CHECK-NEXT: Address: 0x20000
+# CHECK-NEXT: Offset: 0x10000
# CHECK-NEXT: Size: 12
# CHECK-NEXT: Link: 0
# CHECK-NEXT: Info: 0
@@ -74,7 +74,7 @@ _start:
# CHECK-NEXT: Flags [ (0x0)
# CHECK-NEXT: ]
# CHECK-NEXT: Address: 0x0
-# CHECK-NEXT: Offset: 0x1010
+# CHECK-NEXT: Offset: 0x10010
# CHECK-NEXT: Size: 72
# CHECK-NEXT: Link: 4
# CHECK-NEXT: Info: 2
@@ -88,7 +88,7 @@ _start:
# CHECK-NEXT: Flags [ (0x0)
# CHECK-NEXT: ]
# CHECK-NEXT: Address: 0x0
-# CHECK-NEXT: Offset: 0x1058
+# CHECK-NEXT: Offset: 0x10058
# CHECK-NEXT: Size: 33
# CHECK-NEXT: Link: 0
# CHECK-NEXT: Info: 0
@@ -102,7 +102,7 @@ _start:
# CHECK-NEXT: Flags [ (0x0)
# CHECK-NEXT: ]
# CHECK-NEXT: Address: 0x0
-# CHECK-NEXT: Offset: 0x1079
+# CHECK-NEXT: Offset: 0x10079
# CHECK-NEXT: Size: 13
# CHECK-NEXT: Link: 0
# CHECK-NEXT: Info: 0
@@ -122,7 +122,7 @@ _start:
# CHECK-NEXT: }
# CHECK-NEXT: Symbol {
# CHECK-NEXT: Name: $x.0
-# CHECK-NEXT: Value: 0x11000
+# CHECK-NEXT: Value: 0x20000
# CHECK-NEXT: Size: 0
# CHECK-NEXT: Binding: Local (0x0)
# CHECK-NEXT: Type: None (0x0)
@@ -162,20 +162,20 @@ _start:
# CHECK-NEXT: Flags [
# CHECK-NEXT: PF_R
# CHECK-NEXT: ]
-# CHECK-NEXT: Alignment: 4096
+# CHECK-NEXT: Alignment: 65536
# CHECK-NEXT: }
# CHECK-NEXT: ProgramHeader {
# CHECK-NEXT: Type: PT_LOAD (0x1)
# CHECK-NEXT: Offset: 0x1000
-# CHECK-NEXT: VirtualAddress: 0x11000
-# CHECK-NEXT: PhysicalAddress: 0x11000
+# CHECK-NEXT: VirtualAddress: 0x20000
+# CHECK-NEXT: PhysicalAddress: 0x20000
# CHECK-NEXT: FileSize: 12
# CHECK-NEXT: MemSize: 12
# CHECK-NEXT: Flags [ (0x5)
# CHECK-NEXT: PF_R (0x4)
# CHECK-NEXT: PF_X (0x1)
# CHECK-NEXT: ]
-# CHECK-NEXT: Alignment: 4096
+# CHECK-NEXT: Alignment: 65536
# CHECK-NEXT: }
# CHECK-NEXT: ProgramHeader {
# CHECK-NEXT: Type: PT_GNU_STACK
Modified: lld/trunk/test/ELF/got-aarch64.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/got-aarch64.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/got-aarch64.s (original)
+++ lld/trunk/test/ELF/got-aarch64.s Tue Oct 4 03:58:55 2016
@@ -10,7 +10,7 @@
// CHECK-NEXT: SHF_ALLOC
// CHECK-NEXT: SHF_WRITE
// CHECK-NEXT: ]
-// CHECK-NEXT: Address: 0x2090
+// CHECK-NEXT: Address: 0x20090
// CHECK-NEXT: Offset:
// CHECK-NEXT: Size: 8
// CHECK-NEXT: Link: 0
@@ -19,16 +19,16 @@
// CHECK: Relocations [
// CHECK-NEXT: Section ({{.*}}) .rela.dyn {
-// CHECK-NEXT: 0x2090 R_AARCH64_GLOB_DAT dat 0x0
+// CHECK-NEXT: 0x20090 R_AARCH64_GLOB_DAT dat 0x0
// CHECK-NEXT: }
// CHECK-NEXT: ]
-// Page(0x2098) - Page(0x1000) = 0x1000 = 4096
-// 0x2098 & 0xff8 = 0x98 = 152
+// Page(0x20098) - Page(0x10000) = 0x10000 = 65536
+// 0x20098 & 0xff8 = 0x98 = 152
// DISASM: main:
-// DISASM-NEXT: 1000: {{.*}} adrp x0, #4096
-// DISASM-NEXT: 1004: {{.*}} ldr x0, [x0, #144]
+// DISASM-NEXT: 10000: 80 00 00 90 adrp x0, #65536
+// DISASM-NEXT: 10004: 00 48 40 f9 ldr x0, [x0, #144]
.global main,foo,dat
.text
Modified: lld/trunk/test/ELF/plt-aarch64.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/plt-aarch64.s?rev=283200&r1=283199&r2=283200&view=diff
==============================================================================
--- lld/trunk/test/ELF/plt-aarch64.s (original)
+++ lld/trunk/test/ELF/plt-aarch64.s Tue Oct 4 03:58:55 2016
@@ -18,7 +18,7 @@
// CHECKDSO-NEXT: SHF_ALLOC
// CHECKDSO-NEXT: SHF_EXECINSTR
// CHECKDSO-NEXT: ]
-// CHECKDSO-NEXT: Address: 0x1010
+// CHECKDSO-NEXT: Address: 0x10010
// CHECKDSO-NEXT: Offset:
// CHECKDSO-NEXT: Size: 80
// CHECKDSO-NEXT: Link:
@@ -31,7 +31,7 @@
// CHECKDSO-NEXT: SHF_ALLOC
// CHECKDSO-NEXT: SHF_WRITE
// CHECKDSO-NEXT: ]
-// CHECKDSO-NEXT: Address: 0x3000
+// CHECKDSO-NEXT: Address: 0x30000
// CHECKDSO-NEXT: Offset:
// CHECKDSO-NEXT: Size: 48
// CHECKDSO-NEXT: Link:
@@ -41,72 +41,72 @@
// CHECKDSO: Relocations [
// CHECKDSO-NEXT: Section ({{.*}}) .rela.plt {
-// &(.got.plt[3]) = 0x3000 + 3 * 8 = 0x3018
-// CHECKDSO-NEXT: 0x3018 R_AARCH64_JUMP_SLOT foo
+// &(.got.plt[3]) = 0x30000 + 3 * 8 = 0x30018
+// CHECKDSO-NEXT: 0x30018 R_AARCH64_JUMP_SLOT foo
-// &(.got.plt[4]) = 0x3000 + 4 * 8 = 0x3020
-// CHECKDSO-NEXT: 0x3020 R_AARCH64_JUMP_SLOT bar
+// &(.got.plt[4]) = 0x30000 + 4 * 8 = 0x30020
+// CHECKDSO-NEXT: 0x30020 R_AARCH64_JUMP_SLOT bar
-// &(.got.plt[5]) = 0x3000 + 5 * 8 = 0x3028
-// CHECKDSO-NEXT: 0x3028 R_AARCH64_JUMP_SLOT weak
+// &(.got.plt[5]) = 0x30000 + 5 * 8 = 0x30028
+// CHECKDSO-NEXT: 0x30028 R_AARCH64_JUMP_SLOT weak
// CHECKDSO-NEXT: }
// CHECKDSO-NEXT: ]
// DUMPDSO: Contents of section .got.plt:
// .got.plt[0..2] = 0 (reserved)
-// .got.plt[3..5] = .plt = 0x1010
-// DUMPDSO-NEXT: 3000 00000000 00000000 00000000 00000000 ................
-// DUMPDSO-NEXT: 3010 00000000 00000000 10100000 00000000 ................
-// DUMPDSO-NEXT: 3020 10100000 00000000 10100000 00000000 ................
+// .got.plt[3..5] = .plt = 0x10010
+// DUMPDSO-NEXT: 30000 00000000 00000000 00000000 00000000 ................
+// DUMPDSO-NEXT: 30010 00000000 00000000 10000100 00000000 ................
+// DUMPDSO-NEXT: 30020 10000100 00000000 10000100 00000000 ................
// DISASMDSO: _start:
-// 0x1030 - 0x1000 = 0x30 = 48
-// DISASMDSO-NEXT: 1000: 0c 00 00 14 b #48
-// 0x1040 - 0x1004 = 0x3c = 60
-// DISASMDSO-NEXT: 1004: 0f 00 00 14 b #60
-// 0x1050 - 0x1008 = 0x48 = 72
-// DISASMDSO-NEXT: 1008: 12 00 00 14 b #72
+// 0x10030 - 0x10000 = 0x30 = 48
+// DISASMDSO-NEXT: 10000: 0c 00 00 14 b #48
+// 0x10040 - 0x10004 = 0x3c = 60
+// DISASMDSO-NEXT: 10004: 0f 00 00 14 b #60
+// 0x10050 - 0x10008 = 0x48 = 72
+// DISASMDSO-NEXT: 10008: 12 00 00 14 b #72
// DISASMDSO: foo:
-// DISASMDSO-NEXT: 100c: 1f 20 03 d5 nop
+// DISASMDSO-NEXT: 1000c: 1f 20 03 d5 nop
// DISASMDSO: Disassembly of section .plt:
// DISASMDSO-NEXT: .plt:
-// DISASMDSO-NEXT: 1010: f0 7b bf a9 stp x16, x30, [sp, #-16]!
+// DISASMDSO-NEXT: 10010: f0 7b bf a9 stp x16, x30, [sp, #-16]!
// &(.got.plt[2]) = 0x3000 + 2 * 8 = 0x3010
-// Page(0x3010) - Page(0x1014) = 0x3000 - 0x1000 = 0x2000 = 8192
-// DISASMDSO-NEXT: 1014: 10 00 00 d0 adrp x16, #8192
+// Page(0x30010) - Page(0x10014) = 0x30000 - 0x10000 = 0x20000 = 131072
+// DISASMDSO-NEXT: 10014: 10 01 00 90 adrp x16, #131072
// 0x3010 & 0xFFF = 0x10 = 16
-// DISASMDSO-NEXT: 1018: 11 0a 40 f9 ldr x17, [x16, #16]
-// DISASMDSO-NEXT: 101c: 10 42 00 91 add x16, x16, #16
-// DISASMDSO-NEXT: 1020: 20 02 1f d6 br x17
-// DISASMDSO-NEXT: 1024: 1f 20 03 d5 nop
-// DISASMDSO-NEXT: 1028: 1f 20 03 d5 nop
-// DISASMDSO-NEXT: 102c: 1f 20 03 d5 nop
+// DISASMDSO-NEXT: 10018: 11 0a 40 f9 ldr x17, [x16, #16]
+// DISASMDSO-NEXT: 1001c: 10 42 00 91 add x16, x16, #16
+// DISASMDSO-NEXT: 10020: 20 02 1f d6 br x17
+// DISASMDSO-NEXT: 10024: 1f 20 03 d5 nop
+// DISASMDSO-NEXT: 10028: 1f 20 03 d5 nop
+// DISASMDSO-NEXT: 1002c: 1f 20 03 d5 nop
// foo at plt
-// Page(0x3018) - Page(0x1030) = 0x3000 - 0x1000 = 0x2000 = 8192
-// DISASMDSO-NEXT: 1030: 10 00 00 d0 adrp x16, #8192
+// Page(0x30018) - Page(0x10030) = 0x30000 - 0x10000 = 0x20000 = 131072
+// DISASMDSO-NEXT: 10030: 10 01 00 90 adrp x16, #131072
// 0x3018 & 0xFFF = 0x18 = 24
-// DISASMDSO-NEXT: 1034: 11 0e 40 f9 ldr x17, [x16, #24]
-// DISASMDSO-NEXT: 1038: 10 62 00 91 add x16, x16, #24
-// DISASMDSO-NEXT: 103c: 20 02 1f d6 br x17
+// DISASMDSO-NEXT: 10034: 11 0e 40 f9 ldr x17, [x16, #24]
+// DISASMDSO-NEXT: 10038: 10 62 00 91 add x16, x16, #24
+// DISASMDSO-NEXT: 1003c: 20 02 1f d6 br x17
// bar at plt
-// Page(0x3020) - Page(0x1040) = 0x3000 - 0x1000 = 0x2000 = 8192
-// DISASMDSO-NEXT: 1040: 10 00 00 d0 adrp x16, #8192
+// Page(0x30020) - Page(0x10040) = 0x30000 - 0x10000 = 0x20000 = 131072
+// DISASMDSO-NEXT: 10040: 10 01 00 90 adrp x16, #131072
// 0x3020 & 0xFFF = 0x20 = 32
-// DISASMDSO-NEXT: 1044: 11 12 40 f9 ldr x17, [x16, #32]
-// DISASMDSO-NEXT: 1048: 10 82 00 91 add x16, x16, #32
-// DISASMDSO-NEXT: 104c: 20 02 1f d6 br x17
+// DISASMDSO-NEXT: 10044: 11 12 40 f9 ldr x17, [x16, #32]
+// DISASMDSO-NEXT: 10048: 10 82 00 91 add x16, x16, #32
+// DISASMDSO-NEXT: 1004c: 20 02 1f d6 br x17
// weak at plt
-// Page(0x3028) - Page(0x1050) = 0x3000 - 0x1000 = 0x2000 = 8192
-// DISASMDSO-NEXT: 1050: 10 00 00 d0 adrp x16, #8192
+// Page(0x30028) - Page(0x10050) = 0x30000 - 0x10000 = 0x20000 = 131072
+// DISASMDSO-NEXT: 10050: 10 01 00 90 adrp x16, #131072
// 0x3028 & 0xFFF = 0x28 = 40
-// DISASMDSO-NEXT: 1054: 11 16 40 f9 ldr x17, [x16, #40]
-// DISASMDSO-NEXT: 1058: 10 a2 00 91 add x16, x16, #40
-// DISASMDSO-NEXT: 105c: 20 02 1f d6 br x17
+// DISASMDSO-NEXT: 10054: 11 16 40 f9 ldr x17, [x16, #40]
+// DISASMDSO-NEXT: 10058: 10 a2 00 91 add x16, x16, #40
+// DISASMDSO-NEXT: 1005c: 20 02 1f d6 br x17
// CHECKEXE: Name: .plt
// CHECKEXE-NEXT: Type: SHT_PROGBITS
@@ -114,7 +114,7 @@
// CHECKEXE-NEXT: SHF_ALLOC
// CHECKEXE-NEXT: SHF_EXECINSTR
// CHECKEXE-NEXT: ]
-// CHECKEXE-NEXT: Address: 0x11010
+// CHECKEXE-NEXT: Address: 0x20010
// CHECKEXE-NEXT: Offset:
// CHECKEXE-NEXT: Size: 64
// CHECKEXE-NEXT: Link:
@@ -127,7 +127,7 @@
// CHECKEXE-NEXT: SHF_ALLOC
// CHECKEXE-NEXT: SHF_WRITE
// CHECKEXE-NEXT: ]
-// CHECKEXE-NEXT: Address: 0x13000
+// CHECKEXE-NEXT: Address: 0x40000
// CHECKEXE-NEXT: Offset:
// CHECKEXE-NEXT: Size: 40
// CHECKEXE-NEXT: Link:
@@ -138,60 +138,58 @@
// CHECKEXE-NEXT: Section ({{.*}}) .rela.plt {
// &(.got.plt[3]) = 0x13000 + 3 * 8 = 0x13018
-// CHECKEXE-NEXT: 0x13018 R_AARCH64_JUMP_SLOT bar 0x0
+// CHECKEXE-NEXT: 0x40018 R_AARCH64_JUMP_SLOT bar 0x0
// &(.got.plt[4]) = 0x13000 + 4 * 8 = 0x13020
-// CHECKEXE-NEXT: 0x13020 R_AARCH64_JUMP_SLOT weak 0x0
+// CHECKEXE-NEXT: 0x40020 R_AARCH64_JUMP_SLOT weak 0x0
// CHECKEXE-NEXT: }
// CHECKEXE-NEXT: ]
// DUMPEXE: Contents of section .got.plt:
// .got.plt[0..2] = 0 (reserved)
-// .got.plt[3..4] = .plt = 0x11010
-// DUMPEXE-NEXT: 13000 00000000 00000000 00000000 00000000 ................
-// DUMPEXE-NEXT: 13010 00000000 00000000 10100100 00000000 ................
-// DUMPEXE-NEXT: 13020 10100100 00000000 ........
+// .got.plt[3..4] = .plt = 0x40010
+// DUMPEXE-NEXT: 40000 00000000 00000000 00000000 00000000 ................
+// DUMPEXE-NEXT: 40010 00000000 00000000 10000200 00000000 ................
+// DUMPEXE-NEXT: 40020 10000200 00000000 ........
// DISASMEXE: _start:
-// 0x1100c - 0x11000 = 0xc = 12
-// DISASMEXE-NEXT: 11000: 03 00 00 14 b #12
-// 0x11030 - 0x11004 = 0x2c = 44
-// DISASMEXE-NEXT: 11004: 0b 00 00 14 b #44
-// 0x11040 - 0x11008 = 0x38 = 56
-// DISASMEXE-NEXT: 11008: 0e 00 00 14 b #56
+// 0x2000c - 0x20000 = 0xc = 12
+// DISASMEXE-NEXT: 20000: 03 00 00 14 b #12
+// 0x20030 - 0x20004 = 0x2c = 44
+// DISASMEXE-NEXT: 20004: 0b 00 00 14 b #44
+// 0x20040 - 0x20008 = 0x38 = 56
+// DISASMEXE-NEXT: 20008: 0e 00 00 14 b #56
// DISASMEXE: foo:
-// DISASMEXE-NEXT: 1100c: 1f 20 03 d5 nop
+// DISASMEXE-NEXT: 2000c: 1f 20 03 d5 nop
// DISASMEXE: Disassembly of section .plt:
// DISASMEXE-NEXT: .plt:
-// DISASMEXE-NEXT: 11010: f0 7b bf a9 stp x16, x30, [sp, #-16]!
-// &(.got.plt[2]) = 0x120B0 + 2 * 8 = 0x120C0
-// Page(0x13010) - Page(0x11014) = 0x13000 - 0x11000 = 0x1000 = 8192
-// DISASMEXE-NEXT: 11014: 10 00 00 d0 adrp x16, #8192
+// DISASMEXE-NEXT: 20010: f0 7b bf a9 stp x16, x30, [sp, #-16]!
+// &(.got.plt[2]) = 0x300B0 + 2 * 8 = 0x300C0
+// Page(0x40010) - Page(0x20014) = 0x40000 - 0x20000 = 0x20000 = 131072
+// DISASMEXE-NEXT: 20014: 10 01 00 90 adrp x16, #131072
// 0x120c0 & 0xFFF = 0xC0 = 192
-// DISASMEXE-NEXT: 11018: 11 0a 40 f9 ldr x17, [x16, #16]
-// DISASMEXE-NEXT: 1101c: 10 42 00 91 add x16, x16, #16
-// DISASMEXE-NEXT: 11020: 20 02 1f d6 br x17
-// DISASMEXE-NEXT: 11024: 1f 20 03 d5 nop
-// DISASMEXE-NEXT: 11028: 1f 20 03 d5 nop
-// DISASMEXE-NEXT: 1102c: 1f 20 03 d5 nop
+// DISASMEXE-NEXT: 20018: 11 0a 40 f9 ldr x17, [x16, #16]
+// DISASMEXE-NEXT: 2001c: 10 42 00 91 add x16, x16, #16
+// DISASMEXE-NEXT: 20020: 20 02 1f d6 br x17
+// DISASMEXE-NEXT: 20024: 1f 20 03 d5 nop
+// DISASMEXE-NEXT: 20028: 1f 20 03 d5 nop
+// DISASMEXE-NEXT: 2002c: 1f 20 03 d5 nop
// bar at plt
-// Page(0x13018) - Page(0x11030) = 0x12000 - 0x11000 = 0x1000 = 8192
-// DISASMEXE-NEXT: 11030: 10 00 00 d0 adrp x16, #8192
-// 0x120C8 & 0xFFF = 0xC8 = 200
-// DISASMEXE-NEXT: 11034: 11 0e 40 f9 ldr x17, [x16, #24]
-// DISASMEXE-NEXT: 11038: 10 62 00 91 add x16, x16, #24
-// DISASMEXE-NEXT: 1103c: 20 02 1f d6 br x17
+// Page(0x40018) - Page(0x20030) = 0x40000 - 0x20000 = 0x20000 = 131072
+// DISASMEXE-NEXT: 20030: 10 01 00 90 adrp x16, #131072
+// DISASMEXE-NEXT: 20034: 11 0e 40 f9 ldr x17, [x16, #24]
+// DISASMEXE-NEXT: 20038: 10 62 00 91 add x16, x16, #24
+// DISASMEXE-NEXT: 2003c: 20 02 1f d6 br x17
// weak at plt
-// Page(0x13020) - Page(0x11040) = 0x12000 - 0x11000 = 0x1000 = 8192
-// DISASMEXE-NEXT: 11040: 10 00 00 d0 adrp x16, #8192
-// 0x120D0 & 0xFFF = 0xD0 = 208
-// DISASMEXE-NEXT: 11044: 11 12 40 f9 ldr x17, [x16, #32]
-// DISASMEXE-NEXT: 11048: 10 82 00 91 add x16, x16, #32
-// DISASMEXE-NEXT: 1104c: 20 02 1f d6 br x17
+// Page(0x40020) - Page(0x20040) = 0x40000 - 0x20000 = 0x20000 = 131072
+// DISASMEXE-NEXT: 20040: 10 01 00 90 adrp x16, #131072
+// DISASMEXE-NEXT: 20044: 11 12 40 f9 ldr x17, [x16, #32]
+// DISASMEXE-NEXT: 20048: 10 82 00 91 add x16, x16, #32
+// DISASMEXE-NEXT: 2004c: 20 02 1f d6 br x17
.global _start,foo,bar
.weak weak
More information about the llvm-commits
mailing list