[PATCH] D24627: X86: Do not produce GOT relocations on windows

[Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL283140: X86: Do not produce GOT relocations on windows (authored by matze).

Changed prior to commit:
  https://reviews.llvm.org/D24627?vs=71549&id=73417#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D24627

Files:
  llvm/trunk/lib/Target/TargetMachine.cpp
  llvm/trunk/test/CodeGen/X86/x86-64-pic-12.ll


Index: llvm/trunk/lib/Target/TargetMachine.cpp
===================================================================
--- llvm/trunk/lib/Target/TargetMachine.cpp
+++ llvm/trunk/lib/Target/TargetMachine.cpp
@@ -127,8 +127,11 @@
   if (GV && GV->hasDLLImportStorageClass())
     return false;
 
-  // Every other GV is local on COFF
-  if (TT.isOSBinFormatCOFF())
+  // Every other GV is local on COFF.
+  // Make an exception for windows OS in the triple: Some firmwares builds use
+  // *-win32-macho triples. This (accidentally?) produced windows relocations
+  // without GOT tables in older clang versions; Keep this behaviour.
+  if (TT.isOSBinFormatCOFF() || TT.isOSWindows())
     return true;
 
   if (GV && (GV->hasLocalLinkage() || !GV->hasDefaultVisibility()))
Index: llvm/trunk/test/CodeGen/X86/x86-64-pic-12.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/x86-64-pic-12.ll
+++ llvm/trunk/test/CodeGen/X86/x86-64-pic-12.ll
@@ -0,0 +1,27 @@
+; RUN: llc -o - %s -relocation-model=pic | FileCheck %s
+; Check that we do not get GOT relocations with the x86_64-pc-windows-macho
+; triple.
+target triple = "x86_64-pc-windows-macho"
+
+ at g = common global i32 0, align 4
+
+declare i32 @extbar()
+
+; CHECK-LABEL: bar:
+; CHECK: callq _extbar
+; CHECK: leaq _extbar(%rip),
+; CHECK-NOT: @GOT
+define i8* @bar() {
+  call i32 @extbar()
+  ret i8* bitcast (i32 ()* @extbar to i8*)
+}
+
+; CHECK-LABEL: foo:
+; CHECK: callq _bar
+; CHECK: movl _g(%rip),
+; CHECK-NOT: @GOT
+define i32 @foo() {
+  call i8* @bar()
+  %gval = load i32, i32* @g, align 4
+  ret i32 %gval
+}


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