[PATCH] D25222: [AVX-512] Use AVX512 feature instead of VLX to determine whether to use extended 128/256-bit register classes for addRegisterClass.

[Craig Topper via llvm-commits]

craig.topper created this revision.
craig.topper added a reviewer: delena.
craig.topper added a subscriber: llvm-commits.

Hopefully now that we are able to spill XMM16-31 and YMM16-31 without VLX we should be able to use the larger register classes and rely on individual instruction register class constraints to control register selection.

This should allow some instructions that read or write 128/256-bit registers without VLX to use extended registers. For example VEXTRACTF32x4.

Ideally we'd just always pass the extended register classes regardless of AVX512 mode, but that fails machine verifier when VEX encoded 128-bit and 256-bit move instructions are emitted from copyPhysReg with the larger register class.


https://reviews.llvm.org/D25222

Files:
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86RegisterInfo.cpp
  test/CodeGen/X86/vector-half-conversions.ll

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