[PATCH] D25215: [InstCombine] Transform !range metadata to !nonnull when combining loads
Ariel Ben-Yehuda via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 3 17:27:56 PDT 2016
arielb1 set the repository for this revision to rL LLVM.
arielb1 updated this revision to Diff 73383.
arielb1 added a comment.
Fix submission errors.
Repository:
rL LLVM
https://reviews.llvm.org/D25215
Files:
lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
test/Transforms/InstCombine/PR30597-2.ll
test/Transforms/InstCombine/PR30597.ll
Index: test/Transforms/InstCombine/PR30597.ll
===================================================================
--- /dev/null
+++ test/Transforms/InstCombine/PR30597.ll
@@ -0,0 +1,25 @@
+; RUN: opt < %s -instcombine -simplifycfg -S | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; CHECK-LABEL: @dot_ref_s
+; CHECK-NEXT: ret 42
+
+; Function Attrs: readonly uwtable
+define i32 @dot_ref_s(i32** noalias nocapture readonly dereferenceable(8)) {
+entry-block:
+ %loadedptr = load i32*, i32** %0, align 8, !nonnull !0
+ %ptrtoint = ptrtoint i32* %loadedptr to i64
+ %inttoptr = inttoptr i64 %ptrtoint to i32*
+ %switchtmp = icmp eq i32* %inttoptr, null
+ br i1 %switchtmp, label %bb6, label %bb7
+
+bb6:
+ ret i32 0
+
+bb7:
+ ret i32 42
+}
+
+!0 = !{}
Index: test/Transforms/InstCombine/PR30597-2.ll
===================================================================
--- /dev/null
+++ test/Transforms/InstCombine/PR30597-2.ll
@@ -0,0 +1,17 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; CHECK-LABEL: @function
+; CHECK-NEXT: %loaded1 = load i64*, i64** %1, align 8, !nonnull !0
+
+; Function Attrs: readonly uwtable
+define i64* @function(i64* noalias nocapture readonly dereferenceable(8)) {
+entry-block:
+ %loaded = load i64, i64* %0, align 8, !range !0
+ %inttoptr = inttoptr i64 %loaded to i64*
+ ret i64* %inttoptr
+}
+
+!0 = !{i64 1, i64 140737488355327}
Index: lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
===================================================================
--- lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+++ lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
@@ -380,8 +380,16 @@
break;
case LLVMContext::MD_range:
// FIXME: It would be nice to propagate this in some way, but the type
- // conversions make it hard. If the new type is a pointer, we could
- // translate it to !nonnull metadata.
+ // conversions make it hard.
+
+ // If it's a pointer now and the range does not contain 0, make it !nonnull.
+ if (NewTy->isPointerTy()) {
+ unsigned int BitWidth = IC.getDataLayout().getTypeSizeInBits(NewTy);
+ if (!getConstantRangeFromMetadata(*N).contains(APInt(BitWidth, 0))) {
+ MDNode *NN = MDNode::get(LI.getContext(), None);
+ NewLoad->setMetadata(LLVMContext::MD_nonnull, NN);
+ }
+ }
break;
}
}
@@ -1279,7 +1287,7 @@
bool InstCombiner::SimplifyStoreAtEndOfBlock(StoreInst &SI) {
assert(SI.isUnordered() &&
"this code has not been auditted for volatile or ordered store case");
-
+
BasicBlock *StoreBB = SI.getParent();
// Check to see if the successor block has exactly two incoming edges. If
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