[PATCH] D25149: AMDGPU: Initial implementation of VGPR indexing mode

[Matt Arsenault via llvm-commits]

arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added subscribers: tony-tye, yaxunl, nhaehnle, wdng, kzhuravl.

This is the most basic handling of the indirect access
pseudos using GPR indexing mode. This currently only enables
the mode for a single v_mov_b32 and then disables it.
This is much more complicated to use than the movrel instructions,
 so a new optimization pass is probably needed to fold the access
 into the uses and keep the mode enabled for them.


https://reviews.llvm.org/D25149

Files:
  lib/Target/AMDGPU/SIISelLowering.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/VOP1Instructions.td
  test/CodeGen/AMDGPU/indirect-addressing-si.ll

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