[PATCH] D25146: AMDGPU: Remove leftover implicit operands when folding immediates

[Matt Arsenault via llvm-commits]

arsenm created this revision.
arsenm added a reviewer: tstellarAMD.
arsenm added a subscriber: llvm-commits.
Herald added subscribers: tony-tye, yaxunl, nhaehnle, wdng, kzhuravl.

When constant folding an operation to a copy or an immediate
mov, the implicit uses/defs of the old instruction were left behind,
e.g. replacing v_or_b32 left the implicit exec use on the new copy.


https://reviews.llvm.org/D25146

Files:
  lib/Target/AMDGPU/SIFoldOperands.cpp


Index: lib/Target/AMDGPU/SIFoldOperands.cpp
===================================================================
--- lib/Target/AMDGPU/SIFoldOperands.cpp
+++ lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -345,6 +345,24 @@
   return IsScalar ? AMDGPU::S_MOV_B32 : AMDGPU::V_MOV_B32_e32;
 }
 
+/// Remove any leftover implicit operands from mutating the instruction. e.g.
+/// if we replace an s_and_b32 with a copy, we don't need the implicit scc def
+/// anymore.
+static void stripExtraCopyOperands(MachineInstr &MI) {
+  const MCInstrDesc &Desc = MI.getDesc();
+  unsigned NumOps = Desc.getNumOperands() +
+                    Desc.getNumImplicitUses() +
+                    Desc.getNumImplicitDefs();
+
+  for (unsigned I = MI.getNumOperands() - 1; I >= NumOps; --I)
+    MI.RemoveOperand(I);
+}
+
+static void mutateCopyOp(MachineInstr &MI, const MCInstrDesc &NewDesc) {
+  MI.setDesc(NewDesc);
+  stripExtraCopyOperands(MI);
+}
+
 // Try to simplify operations with a constant that may appear after instruction
 // selection.
 static bool tryConstantFoldOp(MachineRegisterInfo &MRI,
@@ -357,7 +375,7 @@
     MachineOperand &Src0 = MI->getOperand(1);
     if (Src0.isImm()) {
       Src0.setImm(~Src0.getImm());
-      MI->setDesc(TII->get(getMovOpc(Opc == AMDGPU::S_NOT_B32)));
+      mutateCopyOp(*MI, TII->get(getMovOpc(Opc == AMDGPU::S_NOT_B32)));
       return true;
     }
 
@@ -388,7 +406,7 @@
 
     Src0->setImm(NewImm);
     MI->RemoveOperand(Src1Idx);
-    MI->setDesc(TII->get(getMovOpc(IsSGPR)));
+    mutateCopyOp(*MI, TII->get(getMovOpc(IsSGPR)));
     return true;
   }
 
@@ -402,11 +420,11 @@
     if (Src1Val == 0) {
       // y = or x, 0 => y = copy x
       MI->RemoveOperand(Src1Idx);
-      MI->setDesc(TII->get(AMDGPU::COPY));
+      mutateCopyOp(*MI, TII->get(AMDGPU::COPY));
     } else if (Src1Val == -1) {
       // y = or x, -1 => y = v_mov_b32 -1
       MI->RemoveOperand(Src1Idx);
-      MI->setDesc(TII->get(getMovOpc(Opc == AMDGPU::S_OR_B32)));
+      mutateCopyOp(*MI, TII->get(getMovOpc(Opc == AMDGPU::S_OR_B32)));
     } else
       return false;
 
@@ -418,11 +436,12 @@
     if (Src1Val == 0) {
       // y = and x, 0 => y = v_mov_b32 0
       MI->RemoveOperand(Src0Idx);
-      MI->setDesc(TII->get(getMovOpc(Opc == AMDGPU::S_AND_B32)));
+      mutateCopyOp(*MI, TII->get(getMovOpc(Opc == AMDGPU::S_AND_B32)));
     } else if (Src1Val == -1) {
       // y = and x, -1 => y = copy x
       MI->RemoveOperand(Src1Idx);
-      MI->setDesc(TII->get(AMDGPU::COPY));
+      mutateCopyOp(*MI, TII->get(AMDGPU::COPY));
+      stripExtraCopyOperands(*MI);
     } else
       return false;
 
@@ -434,7 +453,7 @@
     if (Src1Val == 0) {
       // y = xor x, 0 => y = copy x
       MI->RemoveOperand(Src1Idx);
-      MI->setDesc(TII->get(AMDGPU::COPY));
+      mutateCopyOp(*MI, TII->get(AMDGPU::COPY));
     }
   }
 


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