[PATCH] D21571: [AArch64] Avoid generating indexed vector instructions for Exynos
Abderrazek Zaafrani via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 30 09:39:40 PDT 2016
az marked 5 inline comments as done.
az added inline comments.
> sebpop wrote in AArch64VectorByElementOpt.cpp:171
> This only checks for 1 pair of the current 12 pairs of instructions that may be replaced.
> I think we should put all the 12 pairs in a vector and iterate through all of them.
Since all the instructions of concern, so far, are closely related and are done by the same hardware unit, then they are most likely showing the same behavior. No need to increase compile time for now.
https://reviews.llvm.org/D21571
More information about the llvm-commits
mailing list