[PATCH] D24924: [PPC] Better codegen for AND, ANY_EXT, SRL sequence

[Ehsan Amiri via llvm-commits]

amehsan added inline comments.

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Comment at: lib/Target/PowerPC/PPCISelDAGToDAG.cpp:2639
@@ -2638,1 +2638,3 @@
 
+      auto Op0 = Val.getOperand(0);
+      if (Val.getOpcode() == ISD::ANY_EXTEND && Op0.getOpcode() == ISD::SRL &&
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I am not sure if this is always legal. Will check that.


https://reviews.llvm.org/D24924