[llvm] r282401 - [InstCombine] Fixed bug introduced in r282237

[Alexey Bataev via llvm-commits]

Author: abataev
Date: Mon Sep 26 08:18:59 2016
New Revision: 282401

URL: http://llvm.org/viewvc/llvm-project?rev=282401&view=rev
Log:
[InstCombine] Fixed bug introduced in r282237

The index of the new insertelement instruction was evaluated in the
wrong way, it was considered as the index of the inserted value instead
of index of the position, where the value should be inserted.

Modified:
    llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    llvm/trunk/test/Transforms/InstCombine/vec_demanded_elts.ll

Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp?rev=282401&r1=282400&r2=282401&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp Mon Sep 26 08:18:59 2016
@@ -1048,8 +1048,8 @@ Value *InstCombiner::SimplifyDemandedVec
     if (TmpV) { I->setOperand(1, TmpV); MadeChange = true; }
 
     bool NewUndefElts = false;
-    unsigned LHSIdx = -1u;
-    unsigned RHSIdx = -1u;
+    unsigned LHSIdx = -1u, LHSValIdx = -1u;
+    unsigned RHSIdx = -1u, RHSValIdx = -1u;
     bool LHSUniform = true;
     bool RHSUniform = true;
     for (unsigned i = 0; i < VWidth; i++) {
@@ -1064,7 +1064,8 @@ Value *InstCombiner::SimplifyDemandedVec
           NewUndefElts = true;
           UndefElts.setBit(i);
         } else {
-          LHSIdx = LHSIdx == -1u ? MaskVal : LHSVWidth;
+          LHSIdx = LHSIdx == -1u ? i : LHSVWidth;
+          LHSValIdx = LHSValIdx == -1u ? MaskVal : LHSVWidth;
           LHSUniform = LHSUniform && (MaskVal == i);
         }
       } else {
@@ -1072,7 +1073,8 @@ Value *InstCombiner::SimplifyDemandedVec
           NewUndefElts = true;
           UndefElts.setBit(i);
         } else {
-          RHSIdx = RHSIdx == -1u ? MaskVal - LHSVWidth : LHSVWidth;
+          RHSIdx = RHSIdx == -1u ? i : LHSVWidth;
+          RHSValIdx = RHSValIdx == -1u ? MaskVal - LHSVWidth : LHSVWidth;
           RHSUniform = RHSUniform && (MaskVal - LHSVWidth == i);
         }
       }
@@ -1091,14 +1093,14 @@ Value *InstCombiner::SimplifyDemandedVec
       if (LHSIdx < LHSVWidth && RHSUniform) {
         if (auto *CV = dyn_cast<ConstantVector>(Shuffle->getOperand(0))) {
           Op = Shuffle->getOperand(1);
-          Value = CV->getOperand(LHSIdx);
+          Value = CV->getOperand(LHSValIdx);
           Idx = LHSIdx;
         }
       }
       if (RHSIdx < LHSVWidth && LHSUniform) {
         if (auto *CV = dyn_cast<ConstantVector>(Shuffle->getOperand(1))) {
           Op = Shuffle->getOperand(0);
-          Value = CV->getOperand(RHSIdx);
+          Value = CV->getOperand(RHSValIdx);
           Idx = RHSIdx;
         }
       }

Modified: llvm/trunk/test/Transforms/InstCombine/vec_demanded_elts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/vec_demanded_elts.ll?rev=282401&r1=282400&r2=282401&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/vec_demanded_elts.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/vec_demanded_elts.ll Mon Sep 26 08:18:59 2016
@@ -212,6 +212,15 @@ define <2 x double> @test_fpext(float %f
   ret <2 x double> %ret
 }
 
+define <4 x double> @test_shuffle(<4 x double> %f) {
+; CHECK-LABEL: @test_shuffle(
+; CHECK-NEXT:    [[RET1:%.*]] = insertelement <4 x double> %f, double 1.000000e+00, i32 3
+; CHECK-NEXT:    ret <4 x double> [[RET1]]
+;
+  %ret = shufflevector <4 x double> %f, <4 x double> <double undef, double 1.0, double undef, double undef>, <4 x i32> <i32 0, i32 1, i32 2, i32 5>
+  ret <4 x double> %ret
+}
+
 define <4 x float> @test_select(float %f, float %g) {
 ; CHECK-LABEL: @test_select(
 ; CHECK-NEXT:    [[A0:%.*]] = insertelement <4 x float> undef, float %f, i32 0