[PATCH] D24125: [AMDGPU] Promote uniform i16 ops to i32 ops

[Konstantin Zhuravlyov via llvm-commits]

kzhuravl marked an inline comment as done.
kzhuravl added a comment.

In https://reviews.llvm.org/D24125#550988, @wdng wrote:

> Does this patch work for umed3 instruction? Just want to check.


Yes


================
Comment at: lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp:257-263
@@ +256,9 @@
+
+  if (isSigned(I)) {
+    ExtOp1 = Builder.CreateSExt(I.getOperand(1), I32Ty);
+    ExtOp2 = Builder.CreateSExt(I.getOperand(2), I32Ty);
+  } else {
+    ExtOp1 = Builder.CreateZExt(I.getOperand(1), I32Ty);
+    ExtOp2 = Builder.CreateZExt(I.getOperand(2), I32Ty);
+  }
+  ExtRes = Builder.CreateSelect(I.getOperand(0), ExtOp1, ExtOp2);
----------------
tstellarAMD wrote:
> I think you can always zero extend for select, since you will be discarding the high-bits with the truncate.
min/max tests fail when always zero extending


https://reviews.llvm.org/D24125