[PATCH] D23172: IfConversion: Add implicit uses for live subregisters
Quentin Colombet via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 22 13:12:16 PDT 2016
> On Sep 22, 2016, at 12:53 PM, Krzysztof Parzyszek <kparzysz at codeaurora.org> wrote:
>
> kparzysz added a comment.
>
> In https://reviews.llvm.org/D23172#550016, @qcolombet wrote:
>
>> You shouldn't need the implicit operands anymore, because the double register would make the two reg unit of the simple register live and the uses would be from those reg unit.
>
>
> Then I don't understand.
>
> I have an instruction:
> `d8 = L2_loadrd_io <base-reg>, <offset> # load register double`
>
> It then is predicated (assume that no implicit operands are added):
> `d8 = L2_ploadrdf_io <pred-reg>, <base-reg>, <offset> # load register double if-false`
>
> If if-conversion puts that block together with a prior definition of d8, e.g
> `d8 = <something>
> d8 = L2_ploadrdf_io <pred-reg>, <base-reg>, <offset> # load register double if-false`
> how will the compiler know that the first one is not dead?
Sorry what I meant is that the current code should already add the proper implicit operands, i.e., you shouldn’t need to add the implicit operands that this patch adds.
>
>
> Repository:
> rL LLVM
>
> https://reviews.llvm.org/D23172
>
>
>
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