[PATCH] D24822: [SelectionDAG] Expand MULHU and enable division-by-constant for wide types

[Nicolai Hähnle via llvm-commits]

nhaehnle created this revision.
nhaehnle added reviewers: spatel, bkramer, venkatra, arsenm, tstellarAMD.
nhaehnle added a subscriber: llvm-commits.
Herald added subscribers: nhaehnle, wdng, jyknight.

Converting division by constant to a multiply and shift requires MULHU, which
may not be available for all legal types.

This change will expand MULHU to a sequence of smaller-width multiplies and
additions when necessary. BuildUDIV is changed to reflect this expansion as
well.

This allows 64-bit division-by-constant to use the more efficient multiply
and shift lowering on AMDGPU.

This also affects a lowering on SPARC in a way that might be less efficient,
see the change in the corresponding test case for the effect. It may be
better for SPARC to return true for isIntDivCheap in the 64-bit case, I'd
appreciate some feedback on that.

https://reviews.llvm.org/D24822

Files:
  include/llvm/Target/TargetLowering.h
  lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  lib/CodeGen/SelectionDAG/TargetLowering.cpp
  test/CodeGen/AMDGPU/udiv.ll
  test/CodeGen/SPARC/rem.ll

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