[PATCH] D24808: [AArch64] Avoid materializing 0.0 when generating FP CSEL

[Evandro Menezes via llvm-commits]

evandro created this revision.
evandro added reviewers: t.p.northover, jmolloy, mcrosier, efriedma, ab, silviu.baranga.
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Herald added subscribers: rengolin, aemerson.

Transform `a == 0.0 ? 0.0 : x` to `a == 0.0 ? a : x` and `a != 0.0 ? x : 0.0` to `a != 0.0 ?  x : a` to avoid materializing 0.0.


Repository:
  rL LLVM

https://reviews.llvm.org/D24808

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/fcsel-zero.ll

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