[PATCH] D24723: AVX-512: Fixed a bug in lowering saturated operations on KNL

[Elena Demikhovsky via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL281966: AVX-512: Fixed a bug in lowering saturated operations on KNL. (authored by delena).

Changed prior to commit:
  https://reviews.llvm.org/D24723?vs=71813&id=71916#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D24723

Files:
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/test/CodeGen/X86/xaluo.ll

Index: llvm/trunk/test/CodeGen/X86/xaluo.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/xaluo.ll
+++ llvm/trunk/test/CodeGen/X86/xaluo.ll
@@ -736,14 +736,24 @@
 }
 
 define i1 @bug27873(i64 %c1, i1 %c2) {
+; CHECK-LABEL: bug27873:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    movl $160, %ecx
+; CHECK-NEXT:    movq %rdi, %rax
+; CHECK-NEXT:    mulq %rcx
+; CHECK-NEXT:    seto %al
+; CHECK-NEXT:    orb %sil, %al
+; CHECK-NEXT:    retq
+;
 ; KNL-LABEL: bug27873:
 ; KNL:       ## BB#0:
 ; KNL-NEXT:    andl $1, %esi
 ; KNL-NEXT:    kmovw %esi, %k0
 ; KNL-NEXT:    movl $160, %ecx
 ; KNL-NEXT:    movq %rdi, %rax
 ; KNL-NEXT:    mulq %rcx
 ; KNL-NEXT:    seto %al
+; KNL-NEXT:    andl $1, %eax
 ; KNL-NEXT:    kmovw %eax, %k1
 ; KNL-NEXT:    korw %k1, %k0, %k0
 ; KNL-NEXT:    kmovw %k0, %eax
Index: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
@@ -20867,10 +20867,13 @@
     SDValue Sum = DAG.getNode(X86ISD::UMUL, DL, VTs, LHS, RHS);
 
     SDValue SetCC =
-      DAG.getNode(X86ISD::SETCC, DL, N->getValueType(1),
+      DAG.getNode(X86ISD::SETCC, DL, MVT::i8,
                   DAG.getConstant(X86::COND_O, DL, MVT::i32),
                   SDValue(Sum.getNode(), 2));
 
+    if (N->getValueType(1) == MVT::i1)
+      SetCC = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, SetCC);
+
     return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Sum, SetCC);
   }
   }
@@ -20880,10 +20883,13 @@
   SDValue Sum = DAG.getNode(BaseOp, DL, VTs, LHS, RHS);
 
   SDValue SetCC =
-    DAG.getNode(X86ISD::SETCC, DL, N->getValueType(1),
+    DAG.getNode(X86ISD::SETCC, DL, MVT::i8,
                 DAG.getConstant(Cond, DL, MVT::i32),
                 SDValue(Sum.getNode(), 1));
 
+  if (N->getValueType(1) == MVT::i1)
+    SetCC = DAG.getNode(ISD::TRUNCATE, DL, MVT::i1, SetCC);
+
   return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Sum, SetCC);
 }
 


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