[llvm] r281958 - [AVX-512] Use 512-bit vcvtps2ph/vcvtph2ps to implement fp_to_f16/f16_to_fp when F16C and VLX are not supported.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 19 22:44:48 PDT 2016
Author: ctopper
Date: Tue Sep 20 00:44:47 2016
New Revision: 281958
URL: http://llvm.org/viewvc/llvm-project?rev=281958&view=rev
Log:
[AVX-512] Use 512-bit vcvtps2ph/vcvtph2ps to implement fp_to_f16/f16_to_fp when F16C and VLX are not supported.
Fixes PR23941.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Target/X86/X86InstrAVX512.td
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/test/CodeGen/X86/vector-half-conversions.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=281958&r1=281957&r2=281958&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Sep 20 00:44:47 2016
@@ -350,7 +350,7 @@ X86TargetLowering::X86TargetLowering(con
// If we don't have F16C support, then lower half float conversions
// into library calls.
if (Subtarget.useSoftFloat() ||
- (!Subtarget.hasF16C() && !Subtarget.hasVLX())) {
+ (!Subtarget.hasF16C() && !Subtarget.hasAVX512())) {
setOperationAction(ISD::FP16_TO_FP, MVT::f32, Expand);
setOperationAction(ISD::FP_TO_FP16, MVT::f32, Expand);
}
Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=281958&r1=281957&r2=281958&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Tue Sep 20 00:44:47 2016
@@ -6303,7 +6303,7 @@ let Predicates = [HasAVX512] in {
}
}
-// Patterns for matching conversions from float to half-float and vice versa.
+// Patterns for matching conversions from float to half-float and vice versa.
let Predicates = [HasVLX] in {
// Use MXCSR.RC for rounding instead of explicitly specifying the default
// rounding mode (Nearest-Even, encoded as 0). Both are equivalent in the
@@ -6323,6 +6323,35 @@ let Predicates = [HasVLX] in {
(VCVTPS2PHZ128rr (COPY_TO_REGCLASS FR32X:$src, VR128X), 4)), FR32X)) >;
}
+// Patterns for matching float to half-float conversion when AVX512 is supported
+// but F16C isn't. In that case we have to use 512-bit vectors.
+let Predicates = [HasAVX512, NoVLX, NoF16C] in {
+ def : Pat<(fp_to_f16 FR32X:$src),
+ (i16 (EXTRACT_SUBREG
+ (VMOVPDI2DIZrr
+ (v8i16 (EXTRACT_SUBREG
+ (VCVTPS2PHZrr
+ (INSERT_SUBREG (v16f32 (IMPLICIT_DEF)),
+ (v4f32 (COPY_TO_REGCLASS FR32X:$src, VR128X)),
+ sub_xmm), 4), sub_xmm))), sub_16bit))>;
+
+ def : Pat<(f16_to_fp GR16:$src),
+ (f32 (COPY_TO_REGCLASS
+ (v4f32 (EXTRACT_SUBREG
+ (VCVTPH2PSZrr
+ (INSERT_SUBREG (v16i16 (IMPLICIT_DEF)),
+ (v8i16 (COPY_TO_REGCLASS (MOVSX32rr16 GR16:$src), VR128X)),
+ sub_xmm)), sub_xmm)), FR32X))>;
+
+ def : Pat<(f16_to_fp (i16 (fp_to_f16 FR32X:$src))),
+ (f32 (COPY_TO_REGCLASS
+ (v4f32 (EXTRACT_SUBREG
+ (VCVTPH2PSZrr
+ (VCVTPS2PHZrr (INSERT_SUBREG (v16f32 (IMPLICIT_DEF)),
+ (v4f32 (COPY_TO_REGCLASS FR32X:$src, VR128X)),
+ sub_xmm), 4)), sub_xmm)), FR32X))>;
+}
+
// Unordered/Ordered scalar fp compare with Sea and set EFLAGS
multiclass avx512_ord_cmp_sae<bits<8> opc, X86VectorVTInfo _, SDNode OpNode,
string OpcodeStr> {
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=281958&r1=281957&r2=281958&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Sep 20 00:44:47 2016
@@ -832,6 +832,7 @@ def HasTBM : Predicate<"Subtarget-
def HasMOVBE : Predicate<"Subtarget->hasMOVBE()">;
def HasRDRAND : Predicate<"Subtarget->hasRDRAND()">;
def HasF16C : Predicate<"Subtarget->hasF16C()">;
+def NoF16C : Predicate<"!Subtarget->hasF16C()">;
def HasFSGSBase : Predicate<"Subtarget->hasFSGSBase()">;
def HasLZCNT : Predicate<"Subtarget->hasLZCNT()">;
def HasBMI : Predicate<"Subtarget->hasBMI()">;
Modified: llvm/trunk/test/CodeGen/X86/vector-half-conversions.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-half-conversions.ll?rev=281958&r1=281957&r2=281958&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-half-conversions.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-half-conversions.ll Tue Sep 20 00:44:47 2016
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+f16c | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+f16c | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,-f16c | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512VL
;
@@ -9,12 +9,34 @@
;
define float @cvt_i16_to_f32(i16 %a0) nounwind {
-; ALL-LABEL: cvt_i16_to_f32:
-; ALL: # BB#0:
-; ALL-NEXT: movswl %di, %eax
-; ALL-NEXT: vmovd %eax, %xmm0
-; ALL-NEXT: vcvtph2ps %xmm0, %xmm0
-; ALL-NEXT: retq
+; AVX1-LABEL: cvt_i16_to_f32:
+; AVX1: # BB#0:
+; AVX1-NEXT: movswl %di, %eax
+; AVX1-NEXT: vmovd %eax, %xmm0
+; AVX1-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: cvt_i16_to_f32:
+; AVX2: # BB#0:
+; AVX2-NEXT: movswl %di, %eax
+; AVX2-NEXT: vmovd %eax, %xmm0
+; AVX2-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512F-LABEL: cvt_i16_to_f32:
+; AVX512F: # BB#0:
+; AVX512F-NEXT: movswl %di, %eax
+; AVX512F-NEXT: vmovd %eax, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
+; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: retq
+;
+; AVX512VL-LABEL: cvt_i16_to_f32:
+; AVX512VL: # BB#0:
+; AVX512VL-NEXT: movswl %di, %eax
+; AVX512VL-NEXT: vmovd %eax, %xmm0
+; AVX512VL-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512VL-NEXT: retq
%1 = bitcast i16 %a0 to half
%2 = fpext half %1 to float
ret float %2
@@ -88,15 +110,15 @@ define <4 x float> @cvt_4i16_to_4f32(<4
; AVX512F-NEXT: shrq $48, %rdx
; AVX512F-NEXT: movswl %dx, %edx
; AVX512F-NEXT: vmovd %edx, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
; AVX512F-NEXT: movswl %cx, %ecx
; AVX512F-NEXT: vmovd %ecx, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
; AVX512F-NEXT: cwtl
; AVX512F-NEXT: vmovd %eax, %xmm2
-; AVX512F-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm2
; AVX512F-NEXT: vmovd %esi, %xmm3
-; AVX512F-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3]
; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
@@ -198,15 +220,15 @@ define <4 x float> @cvt_8i16_to_4f32(<8
; AVX512F-NEXT: shrq $48, %rdx
; AVX512F-NEXT: movswl %dx, %edx
; AVX512F-NEXT: vmovd %edx, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
; AVX512F-NEXT: movswl %cx, %ecx
; AVX512F-NEXT: vmovd %ecx, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
; AVX512F-NEXT: cwtl
; AVX512F-NEXT: vmovd %eax, %xmm2
-; AVX512F-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm2
; AVX512F-NEXT: vmovd %esi, %xmm3
-; AVX512F-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3]
; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
@@ -348,42 +370,42 @@ define <8 x float> @cvt_8i16_to_8f32(<8
; AVX512F: # BB#0:
; AVX512F-NEXT: vpextrq $1, %xmm0, %rdx
; AVX512F-NEXT: movq %rdx, %r8
-; AVX512F-NEXT: movq %rdx, %r10
-; AVX512F-NEXT: movswl %dx, %r9d
+; AVX512F-NEXT: movq %rdx, %r9
+; AVX512F-NEXT: movswl %dx, %r10d
; AVX512F-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<kill>
; AVX512F-NEXT: shrl $16, %edx
; AVX512F-NEXT: shrq $32, %r8
-; AVX512F-NEXT: shrq $48, %r10
+; AVX512F-NEXT: shrq $48, %r9
; AVX512F-NEXT: vmovq %xmm0, %rdi
; AVX512F-NEXT: movq %rdi, %rax
-; AVX512F-NEXT: movq %rdi, %rsi
-; AVX512F-NEXT: movswl %di, %ecx
+; AVX512F-NEXT: movq %rdi, %rcx
+; AVX512F-NEXT: movswl %di, %esi
; AVX512F-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<kill>
; AVX512F-NEXT: shrl $16, %edi
; AVX512F-NEXT: shrq $32, %rax
-; AVX512F-NEXT: shrq $48, %rsi
-; AVX512F-NEXT: movswl %si, %esi
-; AVX512F-NEXT: vmovd %esi, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512F-NEXT: shrq $48, %rcx
+; AVX512F-NEXT: movswl %cx, %ecx
+; AVX512F-NEXT: vmovd %ecx, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
; AVX512F-NEXT: cwtl
; AVX512F-NEXT: vmovd %eax, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
; AVX512F-NEXT: movswl %di, %eax
; AVX512F-NEXT: vmovd %eax, %xmm2
-; AVX512F-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512F-NEXT: vmovd %ecx, %xmm3
-; AVX512F-NEXT: vcvtph2ps %xmm3, %xmm3
-; AVX512F-NEXT: movswl %r10w, %eax
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm2
+; AVX512F-NEXT: vmovd %esi, %xmm3
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
+; AVX512F-NEXT: movswl %r9w, %eax
; AVX512F-NEXT: vmovd %eax, %xmm4
-; AVX512F-NEXT: vcvtph2ps %xmm4, %xmm4
+; AVX512F-NEXT: vcvtph2ps %ymm4, %zmm4
; AVX512F-NEXT: movswl %r8w, %eax
; AVX512F-NEXT: vmovd %eax, %xmm5
-; AVX512F-NEXT: vcvtph2ps %xmm5, %xmm5
+; AVX512F-NEXT: vcvtph2ps %ymm5, %zmm5
; AVX512F-NEXT: movswl %dx, %eax
; AVX512F-NEXT: vmovd %eax, %xmm6
-; AVX512F-NEXT: vcvtph2ps %xmm6, %xmm6
-; AVX512F-NEXT: vmovd %r9d, %xmm7
-; AVX512F-NEXT: vcvtph2ps %xmm7, %xmm7
+; AVX512F-NEXT: vcvtph2ps %ymm6, %zmm6
+; AVX512F-NEXT: vmovd %r10d, %xmm7
+; AVX512F-NEXT: vcvtph2ps %ymm7, %zmm7
; AVX512F-NEXT: vinsertps {{.*#+}} xmm6 = xmm7[0],xmm6[0],xmm7[2,3]
; AVX512F-NEXT: vinsertps {{.*#+}} xmm5 = xmm6[0,1],xmm5[0],xmm6[3]
; AVX512F-NEXT: vinsertps {{.*#+}} xmm4 = xmm5[0,1,2],xmm4[0]
@@ -639,98 +661,98 @@ define <16 x float> @cvt_16i16_to_16f32(
;
; AVX512F-LABEL: cvt_16i16_to_16f32:
; AVX512F: # BB#0:
-; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm10
+; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX512F-NEXT: vmovq %xmm0, %rax
; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: shrq $48, %rcx
; AVX512F-NEXT: movswl %cx, %ecx
-; AVX512F-NEXT: vmovd %ecx, %xmm8
+; AVX512F-NEXT: vmovd %ecx, %xmm2
; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: shrq $32, %rcx
; AVX512F-NEXT: movswl %cx, %ecx
-; AVX512F-NEXT: vmovd %ecx, %xmm9
+; AVX512F-NEXT: vmovd %ecx, %xmm3
; AVX512F-NEXT: movswl %ax, %ecx
; AVX512F-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
; AVX512F-NEXT: shrl $16, %eax
; AVX512F-NEXT: cwtl
-; AVX512F-NEXT: vmovd %eax, %xmm11
+; AVX512F-NEXT: vmovd %eax, %xmm4
; AVX512F-NEXT: vpextrq $1, %xmm0, %rax
-; AVX512F-NEXT: vmovd %ecx, %xmm12
+; AVX512F-NEXT: vmovd %ecx, %xmm0
; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: shrq $48, %rcx
; AVX512F-NEXT: movswl %cx, %ecx
-; AVX512F-NEXT: vmovd %ecx, %xmm13
+; AVX512F-NEXT: vmovd %ecx, %xmm5
; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: shrq $32, %rcx
; AVX512F-NEXT: movswl %cx, %ecx
-; AVX512F-NEXT: vmovd %ecx, %xmm14
+; AVX512F-NEXT: vmovd %ecx, %xmm6
; AVX512F-NEXT: movswl %ax, %ecx
; AVX512F-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
; AVX512F-NEXT: shrl $16, %eax
; AVX512F-NEXT: cwtl
-; AVX512F-NEXT: vmovd %eax, %xmm15
-; AVX512F-NEXT: vmovq %xmm10, %rax
-; AVX512F-NEXT: vmovd %ecx, %xmm2
+; AVX512F-NEXT: vmovd %eax, %xmm7
+; AVX512F-NEXT: vmovq %xmm1, %rax
+; AVX512F-NEXT: vmovd %ecx, %xmm8
; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: shrq $48, %rcx
; AVX512F-NEXT: movswl %cx, %ecx
-; AVX512F-NEXT: vmovd %ecx, %xmm3
+; AVX512F-NEXT: vmovd %ecx, %xmm9
; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: shrq $32, %rcx
; AVX512F-NEXT: movswl %cx, %ecx
-; AVX512F-NEXT: vmovd %ecx, %xmm1
+; AVX512F-NEXT: vmovd %ecx, %xmm10
; AVX512F-NEXT: movswl %ax, %ecx
; AVX512F-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
; AVX512F-NEXT: shrl $16, %eax
; AVX512F-NEXT: cwtl
-; AVX512F-NEXT: vmovd %eax, %xmm4
-; AVX512F-NEXT: vpextrq $1, %xmm10, %rax
-; AVX512F-NEXT: vmovd %ecx, %xmm10
+; AVX512F-NEXT: vmovd %eax, %xmm11
+; AVX512F-NEXT: vpextrq $1, %xmm1, %rax
+; AVX512F-NEXT: vmovd %ecx, %xmm1
; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: shrq $48, %rcx
; AVX512F-NEXT: movswl %cx, %ecx
-; AVX512F-NEXT: vmovd %ecx, %xmm5
+; AVX512F-NEXT: vmovd %ecx, %xmm12
; AVX512F-NEXT: movq %rax, %rcx
; AVX512F-NEXT: shrq $32, %rcx
; AVX512F-NEXT: movswl %cx, %ecx
-; AVX512F-NEXT: vmovd %ecx, %xmm6
+; AVX512F-NEXT: vmovd %ecx, %xmm13
; AVX512F-NEXT: movl %eax, %ecx
; AVX512F-NEXT: shrl $16, %ecx
; AVX512F-NEXT: movswl %cx, %ecx
-; AVX512F-NEXT: vmovd %ecx, %xmm7
+; AVX512F-NEXT: vmovd %ecx, %xmm14
; AVX512F-NEXT: cwtl
-; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm8, %xmm8
-; AVX512F-NEXT: vcvtph2ps %xmm9, %xmm9
-; AVX512F-NEXT: vcvtph2ps %xmm11, %xmm11
-; AVX512F-NEXT: vcvtph2ps %xmm12, %xmm12
-; AVX512F-NEXT: vcvtph2ps %xmm13, %xmm13
-; AVX512F-NEXT: vcvtph2ps %xmm14, %xmm14
-; AVX512F-NEXT: vcvtph2ps %xmm15, %xmm15
-; AVX512F-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX512F-NEXT: vcvtph2ps %xmm3, %xmm3
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm4, %xmm4
-; AVX512F-NEXT: vcvtph2ps %xmm10, %xmm10
-; AVX512F-NEXT: vcvtph2ps %xmm5, %xmm5
-; AVX512F-NEXT: vcvtph2ps %xmm6, %xmm6
-; AVX512F-NEXT: vcvtph2ps %xmm7, %xmm7
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm7[0],xmm0[2,3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm6[0],xmm0[3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm5[0]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm4 = xmm10[0],xmm4[0],xmm10[2,3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm4[0,1],xmm1[0],xmm4[3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm3[0]
-; AVX512F-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm15[0],xmm2[2,3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm14[0],xmm1[3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm13[0]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm12[0],xmm11[0],xmm12[2,3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm9[0],xmm2[3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm8[0]
-; AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
-; AVX512F-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0
+; AVX512F-NEXT: vmovd %eax, %xmm15
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm16
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
+; AVX512F-NEXT: vcvtph2ps %ymm4, %zmm4
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
+; AVX512F-NEXT: vcvtph2ps %ymm5, %zmm5
+; AVX512F-NEXT: vcvtph2ps %ymm6, %zmm6
+; AVX512F-NEXT: vcvtph2ps %ymm7, %zmm7
+; AVX512F-NEXT: vcvtph2ps %ymm8, %zmm8
+; AVX512F-NEXT: vcvtph2ps %ymm9, %zmm9
+; AVX512F-NEXT: vcvtph2ps %ymm10, %zmm10
+; AVX512F-NEXT: vcvtph2ps %ymm11, %zmm11
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
+; AVX512F-NEXT: vcvtph2ps %ymm12, %zmm12
+; AVX512F-NEXT: vcvtph2ps %ymm13, %zmm13
+; AVX512F-NEXT: vcvtph2ps %ymm14, %zmm14
+; AVX512F-NEXT: vcvtph2ps %ymm15, %zmm15
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm15[0],xmm14[0],xmm15[2,3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm13[0],xmm2[3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm12[0]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm11[0],xmm1[2,3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm10[0],xmm1[3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm9[0]
+; AVX512F-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm8[0],xmm7[0],xmm8[2,3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm6[0],xmm2[3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm5[0]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[2,3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm3[0],xmm0[3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm16[0]
+; AVX512F-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
+; AVX512F-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512F-NEXT: retq
;
; AVX512VL-LABEL: cvt_16i16_to_16f32:
@@ -838,12 +860,34 @@ define <16 x float> @cvt_16i16_to_16f32(
;
define float @load_cvt_i16_to_f32(i16* %a0) nounwind {
-; ALL-LABEL: load_cvt_i16_to_f32:
-; ALL: # BB#0:
-; ALL-NEXT: movswl (%rdi), %eax
-; ALL-NEXT: vmovd %eax, %xmm0
-; ALL-NEXT: vcvtph2ps %xmm0, %xmm0
-; ALL-NEXT: retq
+; AVX1-LABEL: load_cvt_i16_to_f32:
+; AVX1: # BB#0:
+; AVX1-NEXT: movswl (%rdi), %eax
+; AVX1-NEXT: vmovd %eax, %xmm0
+; AVX1-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_cvt_i16_to_f32:
+; AVX2: # BB#0:
+; AVX2-NEXT: movswl (%rdi), %eax
+; AVX2-NEXT: vmovd %eax, %xmm0
+; AVX2-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512F-LABEL: load_cvt_i16_to_f32:
+; AVX512F: # BB#0:
+; AVX512F-NEXT: movswl (%rdi), %eax
+; AVX512F-NEXT: vmovd %eax, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
+; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill>
+; AVX512F-NEXT: retq
+;
+; AVX512VL-LABEL: load_cvt_i16_to_f32:
+; AVX512VL: # BB#0:
+; AVX512VL-NEXT: movswl (%rdi), %eax
+; AVX512VL-NEXT: vmovd %eax, %xmm0
+; AVX512VL-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512VL-NEXT: retq
%1 = load i16, i16* %a0
%2 = bitcast i16 %1 to half
%3 = fpext half %2 to float
@@ -851,24 +895,81 @@ define float @load_cvt_i16_to_f32(i16* %
}
define <4 x float> @load_cvt_4i16_to_4f32(<4 x i16>* %a0) nounwind {
-; ALL-LABEL: load_cvt_4i16_to_4f32:
-; ALL: # BB#0:
-; ALL-NEXT: movswl 6(%rdi), %eax
-; ALL-NEXT: vmovd %eax, %xmm0
-; ALL-NEXT: vcvtph2ps %xmm0, %xmm0
-; ALL-NEXT: movswl 4(%rdi), %eax
-; ALL-NEXT: vmovd %eax, %xmm1
-; ALL-NEXT: vcvtph2ps %xmm1, %xmm1
-; ALL-NEXT: movswl (%rdi), %eax
-; ALL-NEXT: vmovd %eax, %xmm2
-; ALL-NEXT: vcvtph2ps %xmm2, %xmm2
-; ALL-NEXT: movswl 2(%rdi), %eax
-; ALL-NEXT: vmovd %eax, %xmm3
-; ALL-NEXT: vcvtph2ps %xmm3, %xmm3
-; ALL-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[2,3]
-; ALL-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
-; ALL-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
-; ALL-NEXT: retq
+; AVX1-LABEL: load_cvt_4i16_to_4f32:
+; AVX1: # BB#0:
+; AVX1-NEXT: movswl 6(%rdi), %eax
+; AVX1-NEXT: vmovd %eax, %xmm0
+; AVX1-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX1-NEXT: movswl 4(%rdi), %eax
+; AVX1-NEXT: vmovd %eax, %xmm1
+; AVX1-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX1-NEXT: movswl (%rdi), %eax
+; AVX1-NEXT: vmovd %eax, %xmm2
+; AVX1-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX1-NEXT: movswl 2(%rdi), %eax
+; AVX1-NEXT: vmovd %eax, %xmm3
+; AVX1-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX1-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[2,3]
+; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
+; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_cvt_4i16_to_4f32:
+; AVX2: # BB#0:
+; AVX2-NEXT: movswl 6(%rdi), %eax
+; AVX2-NEXT: vmovd %eax, %xmm0
+; AVX2-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX2-NEXT: movswl 4(%rdi), %eax
+; AVX2-NEXT: vmovd %eax, %xmm1
+; AVX2-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX2-NEXT: movswl (%rdi), %eax
+; AVX2-NEXT: vmovd %eax, %xmm2
+; AVX2-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX2-NEXT: movswl 2(%rdi), %eax
+; AVX2-NEXT: vmovd %eax, %xmm3
+; AVX2-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX2-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[2,3]
+; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
+; AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
+; AVX2-NEXT: retq
+;
+; AVX512F-LABEL: load_cvt_4i16_to_4f32:
+; AVX512F: # BB#0:
+; AVX512F-NEXT: movswl 6(%rdi), %eax
+; AVX512F-NEXT: vmovd %eax, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
+; AVX512F-NEXT: movswl 4(%rdi), %eax
+; AVX512F-NEXT: vmovd %eax, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
+; AVX512F-NEXT: movswl (%rdi), %eax
+; AVX512F-NEXT: vmovd %eax, %xmm2
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm2
+; AVX512F-NEXT: movswl 2(%rdi), %eax
+; AVX512F-NEXT: vmovd %eax, %xmm3
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[2,3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
+; AVX512F-NEXT: retq
+;
+; AVX512VL-LABEL: load_cvt_4i16_to_4f32:
+; AVX512VL: # BB#0:
+; AVX512VL-NEXT: movswl 6(%rdi), %eax
+; AVX512VL-NEXT: vmovd %eax, %xmm0
+; AVX512VL-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512VL-NEXT: movswl 4(%rdi), %eax
+; AVX512VL-NEXT: vmovd %eax, %xmm1
+; AVX512VL-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512VL-NEXT: movswl (%rdi), %eax
+; AVX512VL-NEXT: vmovd %eax, %xmm2
+; AVX512VL-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512VL-NEXT: movswl 2(%rdi), %eax
+; AVX512VL-NEXT: vmovd %eax, %xmm3
+; AVX512VL-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512VL-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[2,3]
+; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
+; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
+; AVX512VL-NEXT: retq
%1 = load <4 x i16>, <4 x i16>* %a0
%2 = bitcast <4 x i16> %1 to <4 x half>
%3 = fpext <4 x half> %2 to <4 x float>
@@ -940,15 +1041,15 @@ define <4 x float> @load_cvt_8i16_to_4f3
; AVX512F-NEXT: shrq $48, %rdx
; AVX512F-NEXT: movswl %dx, %edx
; AVX512F-NEXT: vmovd %edx, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
; AVX512F-NEXT: movswl %cx, %ecx
; AVX512F-NEXT: vmovd %ecx, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
; AVX512F-NEXT: cwtl
; AVX512F-NEXT: vmovd %eax, %xmm2
-; AVX512F-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm2
; AVX512F-NEXT: vmovd %esi, %xmm3
-; AVX512F-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3]
; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
@@ -1064,28 +1165,28 @@ define <8 x float> @load_cvt_8i16_to_8f3
; AVX512F: # BB#0:
; AVX512F-NEXT: movswl 6(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
; AVX512F-NEXT: movswl 4(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
; AVX512F-NEXT: movswl (%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm2
-; AVX512F-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm2
; AVX512F-NEXT: movswl 2(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm3
-; AVX512F-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
; AVX512F-NEXT: movswl 14(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm4
-; AVX512F-NEXT: vcvtph2ps %xmm4, %xmm4
+; AVX512F-NEXT: vcvtph2ps %ymm4, %zmm4
; AVX512F-NEXT: movswl 12(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm5
-; AVX512F-NEXT: vcvtph2ps %xmm5, %xmm5
+; AVX512F-NEXT: vcvtph2ps %ymm5, %zmm5
; AVX512F-NEXT: movswl 8(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm6
-; AVX512F-NEXT: vcvtph2ps %xmm6, %xmm6
+; AVX512F-NEXT: vcvtph2ps %ymm6, %zmm6
; AVX512F-NEXT: movswl 10(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm7
-; AVX512F-NEXT: vcvtph2ps %xmm7, %xmm7
+; AVX512F-NEXT: vcvtph2ps %ymm7, %zmm7
; AVX512F-NEXT: vinsertps {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[2,3]
; AVX512F-NEXT: vinsertps {{.*#+}} xmm5 = xmm6[0,1],xmm5[0],xmm6[3]
; AVX512F-NEXT: vinsertps {{.*#+}} xmm4 = xmm5[0,1,2],xmm4[0]
@@ -1272,65 +1373,65 @@ define <16 x float> @load_cvt_16i16_to_1
; AVX512F: # BB#0:
; AVX512F-NEXT: movswl 6(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm8
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm16
; AVX512F-NEXT: movswl 4(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm9
+; AVX512F-NEXT: vmovd %eax, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm17
; AVX512F-NEXT: movswl (%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm10
+; AVX512F-NEXT: vmovd %eax, %xmm2
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm2
; AVX512F-NEXT: movswl 2(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm11
+; AVX512F-NEXT: vmovd %eax, %xmm3
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
; AVX512F-NEXT: movswl 14(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm12
+; AVX512F-NEXT: vmovd %eax, %xmm4
+; AVX512F-NEXT: vcvtph2ps %ymm4, %zmm4
; AVX512F-NEXT: movswl 12(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm13
+; AVX512F-NEXT: vmovd %eax, %xmm5
+; AVX512F-NEXT: vcvtph2ps %ymm5, %zmm5
; AVX512F-NEXT: movswl 8(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm14
+; AVX512F-NEXT: vmovd %eax, %xmm6
+; AVX512F-NEXT: vcvtph2ps %ymm6, %zmm6
; AVX512F-NEXT: movswl 10(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm15
+; AVX512F-NEXT: vmovd %eax, %xmm7
+; AVX512F-NEXT: vcvtph2ps %ymm7, %zmm7
; AVX512F-NEXT: movswl 22(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512F-NEXT: vmovd %eax, %xmm8
+; AVX512F-NEXT: vcvtph2ps %ymm8, %zmm8
; AVX512F-NEXT: movswl 20(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: vmovd %eax, %xmm9
+; AVX512F-NEXT: vcvtph2ps %ymm9, %zmm9
; AVX512F-NEXT: movswl 16(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm2
-; AVX512F-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512F-NEXT: vmovd %eax, %xmm10
+; AVX512F-NEXT: vcvtph2ps %ymm10, %zmm10
; AVX512F-NEXT: movswl 18(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm3
-; AVX512F-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512F-NEXT: vmovd %eax, %xmm11
+; AVX512F-NEXT: vcvtph2ps %ymm11, %zmm11
; AVX512F-NEXT: movswl 30(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm4
-; AVX512F-NEXT: vcvtph2ps %xmm4, %xmm4
+; AVX512F-NEXT: vmovd %eax, %xmm12
+; AVX512F-NEXT: vcvtph2ps %ymm12, %zmm12
; AVX512F-NEXT: movswl 28(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm5
-; AVX512F-NEXT: vcvtph2ps %xmm5, %xmm5
+; AVX512F-NEXT: vmovd %eax, %xmm13
+; AVX512F-NEXT: vcvtph2ps %ymm13, %zmm13
; AVX512F-NEXT: movswl 24(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm6
-; AVX512F-NEXT: vcvtph2ps %xmm6, %xmm6
+; AVX512F-NEXT: vmovd %eax, %xmm14
+; AVX512F-NEXT: vcvtph2ps %ymm14, %zmm14
; AVX512F-NEXT: movswl 26(%rdi), %eax
-; AVX512F-NEXT: vmovd %eax, %xmm7
-; AVX512F-NEXT: vcvtph2ps %xmm7, %xmm7
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[2,3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm5 = xmm6[0,1],xmm5[0],xmm6[3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm4 = xmm5[0,1,2],xmm4[0]
+; AVX512F-NEXT: vmovd %eax, %xmm15
+; AVX512F-NEXT: vcvtph2ps %ymm15, %zmm15
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm14[0],xmm15[0],xmm14[2,3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm13[0],xmm0[3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm12[0]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm10[0],xmm11[0],xmm10[2,3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm9[0],xmm1[3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm8[0]
+; AVX512F-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm6[0],xmm7[0],xmm6[2,3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm5[0],xmm1[3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm4[0]
; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[2,3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
-; AVX512F-NEXT: vinserti128 $1, %xmm4, %ymm0, %ymm0
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm14[0],xmm15[0],xmm14[2,3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm13[0],xmm1[3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm12[0]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm10[0],xmm11[0],xmm10[2,3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm9[0],xmm2[3]
-; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm8[0]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm17[0],xmm2[3]
+; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm16[0]
; AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1
; AVX512F-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0
; AVX512F-NEXT: retq
@@ -1412,13 +1513,37 @@ define <16 x float> @load_cvt_16i16_to_1
;
define double @cvt_i16_to_f64(i16 %a0) nounwind {
-; ALL-LABEL: cvt_i16_to_f64:
-; ALL: # BB#0:
-; ALL-NEXT: movswl %di, %eax
-; ALL-NEXT: vmovd %eax, %xmm0
-; ALL-NEXT: vcvtph2ps %xmm0, %xmm0
-; ALL-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
-; ALL-NEXT: retq
+; AVX1-LABEL: cvt_i16_to_f64:
+; AVX1: # BB#0:
+; AVX1-NEXT: movswl %di, %eax
+; AVX1-NEXT: vmovd %eax, %xmm0
+; AVX1-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX1-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: cvt_i16_to_f64:
+; AVX2: # BB#0:
+; AVX2-NEXT: movswl %di, %eax
+; AVX2-NEXT: vmovd %eax, %xmm0
+; AVX2-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX2-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512F-LABEL: cvt_i16_to_f64:
+; AVX512F: # BB#0:
+; AVX512F-NEXT: movswl %di, %eax
+; AVX512F-NEXT: vmovd %eax, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
+; AVX512F-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
+; AVX512F-NEXT: retq
+;
+; AVX512VL-LABEL: cvt_i16_to_f64:
+; AVX512VL: # BB#0:
+; AVX512VL-NEXT: movswl %di, %eax
+; AVX512VL-NEXT: vmovd %eax, %xmm0
+; AVX512VL-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512VL-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
+; AVX512VL-NEXT: retq
%1 = bitcast i16 %a0 to half
%2 = fpext half %1 to double
ret double %2
@@ -1468,9 +1593,9 @@ define <2 x double> @cvt_2i16_to_2f64(<2
; AVX512F-NEXT: shrl $16, %eax
; AVX512F-NEXT: cwtl
; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
; AVX512F-NEXT: vmovd %ecx, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
; AVX512F-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1
; AVX512F-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
@@ -1569,15 +1694,15 @@ define <4 x double> @cvt_4i16_to_4f64(<4
; AVX512F-NEXT: shrl $16, %edx
; AVX512F-NEXT: movswl %dx, %edx
; AVX512F-NEXT: vmovd %edx, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
; AVX512F-NEXT: vmovd %esi, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
; AVX512F-NEXT: movswl %cx, %ecx
; AVX512F-NEXT: vmovd %ecx, %xmm2
-; AVX512F-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm2
; AVX512F-NEXT: cwtl
; AVX512F-NEXT: vmovd %eax, %xmm3
-; AVX512F-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
; AVX512F-NEXT: vcvtss2sd %xmm3, %xmm3, %xmm3
; AVX512F-NEXT: vcvtss2sd %xmm2, %xmm2, %xmm2
; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
@@ -1659,9 +1784,9 @@ define <2 x double> @cvt_8i16_to_2f64(<8
; AVX512F-NEXT: shrl $16, %eax
; AVX512F-NEXT: cwtl
; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
; AVX512F-NEXT: vmovd %ecx, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
; AVX512F-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1
; AVX512F-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
@@ -1759,15 +1884,15 @@ define <4 x double> @cvt_8i16_to_4f64(<8
; AVX512F-NEXT: shrl $16, %edx
; AVX512F-NEXT: movswl %dx, %edx
; AVX512F-NEXT: vmovd %edx, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
; AVX512F-NEXT: vmovd %esi, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
; AVX512F-NEXT: movswl %cx, %ecx
; AVX512F-NEXT: vmovd %ecx, %xmm2
-; AVX512F-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm2
; AVX512F-NEXT: cwtl
; AVX512F-NEXT: vmovd %eax, %xmm3
-; AVX512F-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
; AVX512F-NEXT: vcvtss2sd %xmm3, %xmm3, %xmm3
; AVX512F-NEXT: vcvtss2sd %xmm2, %xmm2, %xmm2
; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
@@ -1926,40 +2051,40 @@ define <8 x double> @cvt_8i16_to_8f64(<8
; AVX512F: # BB#0:
; AVX512F-NEXT: vpextrq $1, %xmm0, %rdx
; AVX512F-NEXT: movq %rdx, %r8
-; AVX512F-NEXT: movl %edx, %r10d
-; AVX512F-NEXT: movswl %dx, %r9d
+; AVX512F-NEXT: movl %edx, %r9d
+; AVX512F-NEXT: movswl %dx, %r10d
; AVX512F-NEXT: shrq $48, %rdx
; AVX512F-NEXT: shrq $32, %r8
-; AVX512F-NEXT: shrl $16, %r10d
+; AVX512F-NEXT: shrl $16, %r9d
; AVX512F-NEXT: vmovq %xmm0, %rdi
; AVX512F-NEXT: movq %rdi, %rax
-; AVX512F-NEXT: movl %edi, %esi
-; AVX512F-NEXT: movswl %di, %ecx
+; AVX512F-NEXT: movl %edi, %ecx
+; AVX512F-NEXT: movswl %di, %esi
; AVX512F-NEXT: shrq $48, %rdi
; AVX512F-NEXT: shrq $32, %rax
-; AVX512F-NEXT: shrl $16, %esi
-; AVX512F-NEXT: movswl %si, %esi
-; AVX512F-NEXT: vmovd %esi, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
-; AVX512F-NEXT: vmovd %ecx, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: shrl $16, %ecx
+; AVX512F-NEXT: movswl %cx, %ecx
+; AVX512F-NEXT: vmovd %ecx, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
+; AVX512F-NEXT: vmovd %esi, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
; AVX512F-NEXT: cwtl
; AVX512F-NEXT: vmovd %eax, %xmm2
-; AVX512F-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm2
; AVX512F-NEXT: movswl %di, %eax
; AVX512F-NEXT: vmovd %eax, %xmm3
-; AVX512F-NEXT: vcvtph2ps %xmm3, %xmm3
-; AVX512F-NEXT: movswl %r10w, %eax
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
+; AVX512F-NEXT: movswl %r9w, %eax
; AVX512F-NEXT: vmovd %eax, %xmm4
-; AVX512F-NEXT: vcvtph2ps %xmm4, %xmm4
-; AVX512F-NEXT: vmovd %r9d, %xmm5
-; AVX512F-NEXT: vcvtph2ps %xmm5, %xmm5
+; AVX512F-NEXT: vcvtph2ps %ymm4, %zmm4
+; AVX512F-NEXT: vmovd %r10d, %xmm5
+; AVX512F-NEXT: vcvtph2ps %ymm5, %zmm5
; AVX512F-NEXT: movswl %r8w, %eax
; AVX512F-NEXT: vmovd %eax, %xmm6
-; AVX512F-NEXT: vcvtph2ps %xmm6, %xmm6
+; AVX512F-NEXT: vcvtph2ps %ymm6, %zmm6
; AVX512F-NEXT: movswl %dx, %eax
; AVX512F-NEXT: vmovd %eax, %xmm7
-; AVX512F-NEXT: vcvtph2ps %xmm7, %xmm7
+; AVX512F-NEXT: vcvtph2ps %ymm7, %zmm7
; AVX512F-NEXT: vcvtss2sd %xmm7, %xmm7, %xmm7
; AVX512F-NEXT: vcvtss2sd %xmm6, %xmm6, %xmm6
; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm6 = xmm6[0],xmm7[0]
@@ -2041,13 +2166,37 @@ define <8 x double> @cvt_8i16_to_8f64(<8
;
define double @load_cvt_i16_to_f64(i16* %a0) nounwind {
-; ALL-LABEL: load_cvt_i16_to_f64:
-; ALL: # BB#0:
-; ALL-NEXT: movswl (%rdi), %eax
-; ALL-NEXT: vmovd %eax, %xmm0
-; ALL-NEXT: vcvtph2ps %xmm0, %xmm0
-; ALL-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
-; ALL-NEXT: retq
+; AVX1-LABEL: load_cvt_i16_to_f64:
+; AVX1: # BB#0:
+; AVX1-NEXT: movswl (%rdi), %eax
+; AVX1-NEXT: vmovd %eax, %xmm0
+; AVX1-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX1-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_cvt_i16_to_f64:
+; AVX2: # BB#0:
+; AVX2-NEXT: movswl (%rdi), %eax
+; AVX2-NEXT: vmovd %eax, %xmm0
+; AVX2-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX2-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512F-LABEL: load_cvt_i16_to_f64:
+; AVX512F: # BB#0:
+; AVX512F-NEXT: movswl (%rdi), %eax
+; AVX512F-NEXT: vmovd %eax, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
+; AVX512F-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
+; AVX512F-NEXT: retq
+;
+; AVX512VL-LABEL: load_cvt_i16_to_f64:
+; AVX512VL: # BB#0:
+; AVX512VL-NEXT: movswl (%rdi), %eax
+; AVX512VL-NEXT: vmovd %eax, %xmm0
+; AVX512VL-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512VL-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
+; AVX512VL-NEXT: retq
%1 = load i16, i16* %a0
%2 = bitcast i16 %1 to half
%3 = fpext half %2 to double
@@ -2055,26 +2204,7 @@ define double @load_cvt_i16_to_f64(i16*
}
define <2 x double> @load_cvt_2i16_to_2f64(<2 x i16>* %a0) nounwind {
-; ALL-LABEL: load_cvt_2i16_to_2f64:
-; ALL: # BB#0:
-; ALL-NEXT: movswl (%rdi), %eax
-; ALL-NEXT: vmovd %eax, %xmm0
-; ALL-NEXT: vcvtph2ps %xmm0, %xmm0
-; ALL-NEXT: movswl 2(%rdi), %eax
-; ALL-NEXT: vmovd %eax, %xmm1
-; ALL-NEXT: vcvtph2ps %xmm1, %xmm1
-; ALL-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1
-; ALL-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
-; ALL-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; ALL-NEXT: retq
- %1 = load <2 x i16>, <2 x i16>* %a0
- %2 = bitcast <2 x i16> %1 to <2 x half>
- %3 = fpext <2 x half> %2 to <2 x double>
- ret <2 x double> %3
-}
-
-define <4 x double> @load_cvt_4i16_to_4f64(<4 x i16>* %a0) nounwind {
-; AVX1-LABEL: load_cvt_4i16_to_4f64:
+; AVX1-LABEL: load_cvt_2i16_to_2f64:
; AVX1: # BB#0:
; AVX1-NEXT: movswl (%rdi), %eax
; AVX1-NEXT: vmovd %eax, %xmm0
@@ -2082,22 +2212,12 @@ define <4 x double> @load_cvt_4i16_to_4f
; AVX1-NEXT: movswl 2(%rdi), %eax
; AVX1-NEXT: vmovd %eax, %xmm1
; AVX1-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX1-NEXT: movswl 4(%rdi), %eax
-; AVX1-NEXT: vmovd %eax, %xmm2
-; AVX1-NEXT: vcvtph2ps %xmm2, %xmm2
-; AVX1-NEXT: movswl 6(%rdi), %eax
-; AVX1-NEXT: vmovd %eax, %xmm3
-; AVX1-NEXT: vcvtph2ps %xmm3, %xmm3
-; AVX1-NEXT: vcvtss2sd %xmm3, %xmm3, %xmm3
-; AVX1-NEXT: vcvtss2sd %xmm2, %xmm2, %xmm2
-; AVX1-NEXT: vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
; AVX1-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1
; AVX1-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
-; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
; AVX1-NEXT: retq
;
-; AVX2-LABEL: load_cvt_4i16_to_4f64:
+; AVX2-LABEL: load_cvt_2i16_to_2f64:
; AVX2: # BB#0:
; AVX2-NEXT: movswl (%rdi), %eax
; AVX2-NEXT: vmovd %eax, %xmm0
@@ -2105,7 +2225,75 @@ define <4 x double> @load_cvt_4i16_to_4f
; AVX2-NEXT: movswl 2(%rdi), %eax
; AVX2-NEXT: vmovd %eax, %xmm1
; AVX2-NEXT: vcvtph2ps %xmm1, %xmm1
-; AVX2-NEXT: movswl 4(%rdi), %eax
+; AVX2-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1
+; AVX2-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
+; AVX2-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; AVX2-NEXT: retq
+;
+; AVX512F-LABEL: load_cvt_2i16_to_2f64:
+; AVX512F: # BB#0:
+; AVX512F-NEXT: movswl (%rdi), %eax
+; AVX512F-NEXT: vmovd %eax, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
+; AVX512F-NEXT: movswl 2(%rdi), %eax
+; AVX512F-NEXT: vmovd %eax, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
+; AVX512F-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1
+; AVX512F-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
+; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; AVX512F-NEXT: retq
+;
+; AVX512VL-LABEL: load_cvt_2i16_to_2f64:
+; AVX512VL: # BB#0:
+; AVX512VL-NEXT: movswl (%rdi), %eax
+; AVX512VL-NEXT: vmovd %eax, %xmm0
+; AVX512VL-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512VL-NEXT: movswl 2(%rdi), %eax
+; AVX512VL-NEXT: vmovd %eax, %xmm1
+; AVX512VL-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512VL-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1
+; AVX512VL-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
+; AVX512VL-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; AVX512VL-NEXT: retq
+ %1 = load <2 x i16>, <2 x i16>* %a0
+ %2 = bitcast <2 x i16> %1 to <2 x half>
+ %3 = fpext <2 x half> %2 to <2 x double>
+ ret <2 x double> %3
+}
+
+define <4 x double> @load_cvt_4i16_to_4f64(<4 x i16>* %a0) nounwind {
+; AVX1-LABEL: load_cvt_4i16_to_4f64:
+; AVX1: # BB#0:
+; AVX1-NEXT: movswl (%rdi), %eax
+; AVX1-NEXT: vmovd %eax, %xmm0
+; AVX1-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX1-NEXT: movswl 2(%rdi), %eax
+; AVX1-NEXT: vmovd %eax, %xmm1
+; AVX1-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX1-NEXT: movswl 4(%rdi), %eax
+; AVX1-NEXT: vmovd %eax, %xmm2
+; AVX1-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX1-NEXT: movswl 6(%rdi), %eax
+; AVX1-NEXT: vmovd %eax, %xmm3
+; AVX1-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX1-NEXT: vcvtss2sd %xmm3, %xmm3, %xmm3
+; AVX1-NEXT: vcvtss2sd %xmm2, %xmm2, %xmm2
+; AVX1-NEXT: vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; AVX1-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1
+; AVX1-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
+; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
+; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: load_cvt_4i16_to_4f64:
+; AVX2: # BB#0:
+; AVX2-NEXT: movswl (%rdi), %eax
+; AVX2-NEXT: vmovd %eax, %xmm0
+; AVX2-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX2-NEXT: movswl 2(%rdi), %eax
+; AVX2-NEXT: vmovd %eax, %xmm1
+; AVX2-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX2-NEXT: movswl 4(%rdi), %eax
; AVX2-NEXT: vmovd %eax, %xmm2
; AVX2-NEXT: vcvtph2ps %xmm2, %xmm2
; AVX2-NEXT: movswl 6(%rdi), %eax
@@ -2124,16 +2312,16 @@ define <4 x double> @load_cvt_4i16_to_4f
; AVX512F: # BB#0:
; AVX512F-NEXT: movswl (%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
; AVX512F-NEXT: movswl 2(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
; AVX512F-NEXT: movswl 4(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm2
-; AVX512F-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm2
; AVX512F-NEXT: movswl 6(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm3
-; AVX512F-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
; AVX512F-NEXT: vcvtss2sd %xmm3, %xmm3, %xmm3
; AVX512F-NEXT: vcvtss2sd %xmm2, %xmm2, %xmm2
; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
@@ -2241,15 +2429,15 @@ define <4 x double> @load_cvt_8i16_to_4f
; AVX512F-NEXT: shrl $16, %edx
; AVX512F-NEXT: movswl %dx, %edx
; AVX512F-NEXT: vmovd %edx, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
; AVX512F-NEXT: vmovd %esi, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
; AVX512F-NEXT: movswl %cx, %ecx
; AVX512F-NEXT: vmovd %ecx, %xmm2
-; AVX512F-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm2
; AVX512F-NEXT: cwtl
; AVX512F-NEXT: vmovd %eax, %xmm3
-; AVX512F-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
; AVX512F-NEXT: vcvtss2sd %xmm3, %xmm3, %xmm3
; AVX512F-NEXT: vcvtss2sd %xmm2, %xmm2, %xmm2
; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
@@ -2386,28 +2574,28 @@ define <8 x double> @load_cvt_8i16_to_8f
; AVX512F: # BB#0:
; AVX512F-NEXT: movswl (%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm0
-; AVX512F-NEXT: vcvtph2ps %xmm0, %xmm0
+; AVX512F-NEXT: vcvtph2ps %ymm0, %zmm0
; AVX512F-NEXT: movswl 2(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm1
-; AVX512F-NEXT: vcvtph2ps %xmm1, %xmm1
+; AVX512F-NEXT: vcvtph2ps %ymm1, %zmm1
; AVX512F-NEXT: movswl 4(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm2
-; AVX512F-NEXT: vcvtph2ps %xmm2, %xmm2
+; AVX512F-NEXT: vcvtph2ps %ymm2, %zmm2
; AVX512F-NEXT: movswl 6(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm3
-; AVX512F-NEXT: vcvtph2ps %xmm3, %xmm3
+; AVX512F-NEXT: vcvtph2ps %ymm3, %zmm3
; AVX512F-NEXT: movswl 8(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm4
-; AVX512F-NEXT: vcvtph2ps %xmm4, %xmm4
+; AVX512F-NEXT: vcvtph2ps %ymm4, %zmm4
; AVX512F-NEXT: movswl 10(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm5
-; AVX512F-NEXT: vcvtph2ps %xmm5, %xmm5
+; AVX512F-NEXT: vcvtph2ps %ymm5, %zmm5
; AVX512F-NEXT: movswl 12(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm6
-; AVX512F-NEXT: vcvtph2ps %xmm6, %xmm6
+; AVX512F-NEXT: vcvtph2ps %ymm6, %zmm6
; AVX512F-NEXT: movswl 14(%rdi), %eax
; AVX512F-NEXT: vmovd %eax, %xmm7
-; AVX512F-NEXT: vcvtph2ps %xmm7, %xmm7
+; AVX512F-NEXT: vcvtph2ps %ymm7, %zmm7
; AVX512F-NEXT: vcvtss2sd %xmm7, %xmm7, %xmm7
; AVX512F-NEXT: vcvtss2sd %xmm6, %xmm6, %xmm6
; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm6 = xmm6[0],xmm7[0]
@@ -2478,41 +2666,136 @@ define <8 x double> @load_cvt_8i16_to_8f
;
define i16 @cvt_f32_to_i16(float %a0) nounwind {
-; ALL-LABEL: cvt_f32_to_i16:
-; ALL: # BB#0:
-; ALL-NEXT: vcvtps2ph $4, %xmm0, %xmm0
-; ALL-NEXT: vmovd %xmm0, %eax
-; ALL-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
-; ALL-NEXT: retq
+; AVX1-LABEL: cvt_f32_to_i16:
+; AVX1: # BB#0:
+; AVX1-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX1-NEXT: vmovd %xmm0, %eax
+; AVX1-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: cvt_f32_to_i16:
+; AVX2: # BB#0:
+; AVX2-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX2-NEXT: vmovd %xmm0, %eax
+; AVX2-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX2-NEXT: retq
+;
+; AVX512F-LABEL: cvt_f32_to_i16:
+; AVX512F: # BB#0:
+; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
+; AVX512F-NEXT: vmovd %xmm0, %eax
+; AVX512F-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX512F-NEXT: retq
+;
+; AVX512VL-LABEL: cvt_f32_to_i16:
+; AVX512VL: # BB#0:
+; AVX512VL-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512VL-NEXT: vmovd %xmm0, %eax
+; AVX512VL-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
+; AVX512VL-NEXT: retq
%1 = fptrunc float %a0 to half
%2 = bitcast half %1 to i16
ret i16 %2
}
define <4 x i16> @cvt_4f32_to_4i16(<4 x float> %a0) nounwind {
-; ALL-LABEL: cvt_4f32_to_4i16:
-; ALL: # BB#0:
-; ALL-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
-; ALL-NEXT: vcvtps2ph $4, %xmm1, %xmm1
-; ALL-NEXT: vmovd %xmm1, %eax
-; ALL-NEXT: shll $16, %eax
-; ALL-NEXT: vcvtps2ph $4, %xmm0, %xmm1
-; ALL-NEXT: vmovd %xmm1, %ecx
-; ALL-NEXT: movzwl %cx, %ecx
-; ALL-NEXT: orl %eax, %ecx
-; ALL-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
-; ALL-NEXT: vcvtps2ph $4, %xmm1, %xmm1
-; ALL-NEXT: vmovd %xmm1, %eax
-; ALL-NEXT: shll $16, %eax
-; ALL-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
-; ALL-NEXT: vcvtps2ph $4, %xmm0, %xmm0
-; ALL-NEXT: vmovd %xmm0, %edx
-; ALL-NEXT: movzwl %dx, %edx
-; ALL-NEXT: orl %eax, %edx
-; ALL-NEXT: shlq $32, %rdx
-; ALL-NEXT: orq %rcx, %rdx
-; ALL-NEXT: vmovq %rdx, %xmm0
-; ALL-NEXT: retq
+; AVX1-LABEL: cvt_4f32_to_4i16:
+; AVX1: # BB#0:
+; AVX1-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX1-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX1-NEXT: vmovd %xmm1, %eax
+; AVX1-NEXT: shll $16, %eax
+; AVX1-NEXT: vcvtps2ph $4, %xmm0, %xmm1
+; AVX1-NEXT: vmovd %xmm1, %ecx
+; AVX1-NEXT: movzwl %cx, %ecx
+; AVX1-NEXT: orl %eax, %ecx
+; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
+; AVX1-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX1-NEXT: vmovd %xmm1, %eax
+; AVX1-NEXT: shll $16, %eax
+; AVX1-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
+; AVX1-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX1-NEXT: vmovd %xmm0, %edx
+; AVX1-NEXT: movzwl %dx, %edx
+; AVX1-NEXT: orl %eax, %edx
+; AVX1-NEXT: shlq $32, %rdx
+; AVX1-NEXT: orq %rcx, %rdx
+; AVX1-NEXT: vmovq %rdx, %xmm0
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: cvt_4f32_to_4i16:
+; AVX2: # BB#0:
+; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX2-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX2-NEXT: vmovd %xmm1, %eax
+; AVX2-NEXT: shll $16, %eax
+; AVX2-NEXT: vcvtps2ph $4, %xmm0, %xmm1
+; AVX2-NEXT: vmovd %xmm1, %ecx
+; AVX2-NEXT: movzwl %cx, %ecx
+; AVX2-NEXT: orl %eax, %ecx
+; AVX2-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
+; AVX2-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX2-NEXT: vmovd %xmm1, %eax
+; AVX2-NEXT: shll $16, %eax
+; AVX2-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
+; AVX2-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX2-NEXT: vmovd %xmm0, %edx
+; AVX2-NEXT: movzwl %dx, %edx
+; AVX2-NEXT: orl %eax, %edx
+; AVX2-NEXT: shlq $32, %rdx
+; AVX2-NEXT: orq %rcx, %rdx
+; AVX2-NEXT: vmovq %rdx, %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512F-LABEL: cvt_4f32_to_4i16:
+; AVX512F: # BB#0:
+; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm1
+; AVX512F-NEXT: vmovd %xmm1, %eax
+; AVX512F-NEXT: movzwl %ax, %eax
+; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
+; AVX512F-NEXT: vmovd %xmm1, %ecx
+; AVX512F-NEXT: shll $16, %ecx
+; AVX512F-NEXT: orl %eax, %ecx
+; AVX512F-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
+; AVX512F-NEXT: vmovd %xmm1, %eax
+; AVX512F-NEXT: movzwl %ax, %eax
+; AVX512F-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
+; AVX512F-NEXT: vmovd %xmm0, %edx
+; AVX512F-NEXT: shll $16, %edx
+; AVX512F-NEXT: orl %eax, %edx
+; AVX512F-NEXT: shlq $32, %rdx
+; AVX512F-NEXT: orq %rcx, %rdx
+; AVX512F-NEXT: vmovq %rdx, %xmm0
+; AVX512F-NEXT: retq
+;
+; AVX512VL-LABEL: cvt_4f32_to_4i16:
+; AVX512VL: # BB#0:
+; AVX512VL-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX512VL-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512VL-NEXT: vmovd %xmm1, %eax
+; AVX512VL-NEXT: shll $16, %eax
+; AVX512VL-NEXT: vcvtps2ph $4, %xmm0, %xmm1
+; AVX512VL-NEXT: vmovd %xmm1, %ecx
+; AVX512VL-NEXT: movzwl %cx, %ecx
+; AVX512VL-NEXT: orl %eax, %ecx
+; AVX512VL-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
+; AVX512VL-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512VL-NEXT: vmovd %xmm1, %eax
+; AVX512VL-NEXT: shll $16, %eax
+; AVX512VL-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
+; AVX512VL-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512VL-NEXT: vmovd %xmm0, %edx
+; AVX512VL-NEXT: movzwl %dx, %edx
+; AVX512VL-NEXT: orl %eax, %edx
+; AVX512VL-NEXT: shlq $32, %rdx
+; AVX512VL-NEXT: orq %rcx, %rdx
+; AVX512VL-NEXT: vmovq %rdx, %xmm0
+; AVX512VL-NEXT: retq
%1 = fptrunc <4 x float> %a0 to <4 x half>
%2 = bitcast <4 x half> %1 to <4 x i16>
ret <4 x i16> %2
@@ -2571,22 +2854,23 @@ define <8 x i16> @cvt_4f32_to_8i16_undef
;
; AVX512F-LABEL: cvt_4f32_to_8i16_undef:
; AVX512F: # BB#0:
-; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %eax
-; AVX512F-NEXT: shll $16, %eax
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm1
+; AVX512F-NEXT: movzwl %ax, %eax
+; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %ecx
-; AVX512F-NEXT: movzwl %cx, %ecx
+; AVX512F-NEXT: shll $16, %ecx
; AVX512F-NEXT: orl %eax, %ecx
-; AVX512F-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %eax
-; AVX512F-NEXT: shll $16, %eax
-; AVX512F-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512F-NEXT: movzwl %ax, %eax
+; AVX512F-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
; AVX512F-NEXT: vmovd %xmm0, %edx
-; AVX512F-NEXT: movzwl %dx, %edx
+; AVX512F-NEXT: shll $16, %edx
; AVX512F-NEXT: orl %eax, %edx
; AVX512F-NEXT: shlq $32, %rdx
; AVX512F-NEXT: orq %rcx, %rdx
@@ -2679,22 +2963,23 @@ define <8 x i16> @cvt_4f32_to_8i16_zero(
;
; AVX512F-LABEL: cvt_4f32_to_8i16_zero:
; AVX512F: # BB#0:
-; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %eax
-; AVX512F-NEXT: shll $16, %eax
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm1
+; AVX512F-NEXT: movzwl %ax, %eax
+; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %ecx
-; AVX512F-NEXT: movzwl %cx, %ecx
+; AVX512F-NEXT: shll $16, %ecx
; AVX512F-NEXT: orl %eax, %ecx
-; AVX512F-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %eax
-; AVX512F-NEXT: shll $16, %eax
-; AVX512F-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512F-NEXT: movzwl %ax, %eax
+; AVX512F-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
; AVX512F-NEXT: vmovd %xmm0, %edx
-; AVX512F-NEXT: movzwl %dx, %edx
+; AVX512F-NEXT: shll $16, %edx
; AVX512F-NEXT: orl %eax, %edx
; AVX512F-NEXT: shlq $32, %rdx
; AVX512F-NEXT: orq %rcx, %rdx
@@ -2833,42 +3118,43 @@ define <8 x i16> @cvt_8f32_to_8i16(<8 x
;
; AVX512F-LABEL: cvt_8f32_to_8i16:
; AVX512F: # BB#0:
-; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %eax
-; AVX512F-NEXT: shll $16, %eax
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm1
+; AVX512F-NEXT: movzwl %ax, %eax
+; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %ecx
-; AVX512F-NEXT: movzwl %cx, %ecx
+; AVX512F-NEXT: shll $16, %ecx
; AVX512F-NEXT: orl %eax, %ecx
-; AVX512F-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
-; AVX512F-NEXT: vmovd %xmm1, %edx
-; AVX512F-NEXT: shll $16, %edx
; AVX512F-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %eax
-; AVX512F-NEXT: movzwl %ax, %eax
+; AVX512F-NEXT: movzwl %ax, %edx
+; AVX512F-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
+; AVX512F-NEXT: vmovd %xmm1, %eax
+; AVX512F-NEXT: shll $16, %eax
; AVX512F-NEXT: orl %edx, %eax
; AVX512F-NEXT: shlq $32, %rax
; AVX512F-NEXT: orq %rcx, %rax
; AVX512F-NEXT: vextractf128 $1, %ymm0, %xmm0
-; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %ecx
-; AVX512F-NEXT: shll $16, %ecx
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm1
+; AVX512F-NEXT: movzwl %cx, %ecx
+; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %edx
-; AVX512F-NEXT: movzwl %dx, %edx
+; AVX512F-NEXT: shll $16, %edx
; AVX512F-NEXT: orl %ecx, %edx
-; AVX512F-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %ecx
-; AVX512F-NEXT: shll $16, %ecx
-; AVX512F-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512F-NEXT: movzwl %cx, %ecx
+; AVX512F-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
; AVX512F-NEXT: vmovd %xmm0, %esi
-; AVX512F-NEXT: movzwl %si, %esi
+; AVX512F-NEXT: shll $16, %esi
; AVX512F-NEXT: orl %ecx, %esi
; AVX512F-NEXT: shlq $32, %rsi
; AVX512F-NEXT: orq %rdx, %rsi
@@ -3065,65 +3351,65 @@ define <16 x i16> @cvt_16f32_to_16i16(<1
; AVX512F-LABEL: cvt_16f32_to_16i16:
; AVX512F: # BB#0:
; AVX512F-NEXT: vextractf64x4 $1, %zmm0, %ymm1
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm2
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm2
; AVX512F-NEXT: vmovd %xmm2, %eax
; AVX512F-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm2, %xmm2
+; AVX512F-NEXT: vcvtps2ph $4, %zmm2, %ymm2
; AVX512F-NEXT: vmovd %eax, %xmm3
; AVX512F-NEXT: vmovd %xmm2, %eax
; AVX512F-NEXT: vpermilpd {{.*#+}} xmm2 = xmm1[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm2, %xmm2
+; AVX512F-NEXT: vcvtps2ph $4, %zmm2, %ymm2
; AVX512F-NEXT: vpinsrw $1, %eax, %xmm3, %xmm3
; AVX512F-NEXT: vmovd %xmm2, %eax
; AVX512F-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX512F-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vpinsrw $2, %eax, %xmm3, %xmm3
; AVX512F-NEXT: vmovd %xmm1, %eax
-; AVX512F-NEXT: vcvtps2ph $4, %xmm2, %xmm1
+; AVX512F-NEXT: vcvtps2ph $4, %zmm2, %ymm1
; AVX512F-NEXT: vpinsrw $3, %eax, %xmm3, %xmm3
; AVX512F-NEXT: vmovd %xmm1, %eax
; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vpinsrw $4, %eax, %xmm3, %xmm3
; AVX512F-NEXT: vmovd %xmm1, %eax
; AVX512F-NEXT: vpermilpd {{.*#+}} xmm1 = xmm2[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vpinsrw $5, %eax, %xmm3, %xmm3
; AVX512F-NEXT: vmovd %xmm1, %eax
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm1
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm1
; AVX512F-NEXT: vpermilps {{.*#+}} xmm2 = xmm2[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm2, %xmm2
+; AVX512F-NEXT: vcvtps2ph $4, %zmm2, %ymm2
; AVX512F-NEXT: vpinsrw $6, %eax, %xmm3, %xmm3
; AVX512F-NEXT: vmovd %xmm2, %eax
; AVX512F-NEXT: vpinsrw $7, %eax, %xmm3, %xmm2
; AVX512F-NEXT: vmovd %xmm1, %eax
; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %eax, %xmm3
; AVX512F-NEXT: vmovd %xmm1, %eax
; AVX512F-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vpinsrw $1, %eax, %xmm3, %xmm3
; AVX512F-NEXT: vmovd %xmm1, %eax
; AVX512F-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX512F-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
; AVX512F-NEXT: vpinsrw $2, %eax, %xmm3, %xmm3
; AVX512F-NEXT: vmovd %xmm0, %eax
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm0
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm0
; AVX512F-NEXT: vpinsrw $3, %eax, %xmm3, %xmm3
; AVX512F-NEXT: vmovd %xmm0, %eax
; AVX512F-NEXT: vmovshdup {{.*#+}} xmm0 = xmm1[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
; AVX512F-NEXT: vpinsrw $4, %eax, %xmm3, %xmm3
; AVX512F-NEXT: vmovd %xmm0, %eax
; AVX512F-NEXT: vpermilpd {{.*#+}} xmm0 = xmm1[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
; AVX512F-NEXT: vpinsrw $5, %eax, %xmm3, %xmm3
; AVX512F-NEXT: vmovd %xmm0, %eax
; AVX512F-NEXT: vpermilps {{.*#+}} xmm0 = xmm1[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
; AVX512F-NEXT: vpinsrw $6, %eax, %xmm3, %xmm1
; AVX512F-NEXT: vmovd %xmm0, %eax
; AVX512F-NEXT: vpinsrw $7, %eax, %xmm1, %xmm0
@@ -3207,12 +3493,34 @@ define <16 x i16> @cvt_16f32_to_16i16(<1
;
define void @store_cvt_f32_to_i16(float %a0, i16* %a1) nounwind {
-; ALL-LABEL: store_cvt_f32_to_i16:
-; ALL: # BB#0:
-; ALL-NEXT: vcvtps2ph $4, %xmm0, %xmm0
-; ALL-NEXT: vmovd %xmm0, %eax
-; ALL-NEXT: movw %ax, (%rdi)
-; ALL-NEXT: retq
+; AVX1-LABEL: store_cvt_f32_to_i16:
+; AVX1: # BB#0:
+; AVX1-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX1-NEXT: vmovd %xmm0, %eax
+; AVX1-NEXT: movw %ax, (%rdi)
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: store_cvt_f32_to_i16:
+; AVX2: # BB#0:
+; AVX2-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX2-NEXT: vmovd %xmm0, %eax
+; AVX2-NEXT: movw %ax, (%rdi)
+; AVX2-NEXT: retq
+;
+; AVX512F-LABEL: store_cvt_f32_to_i16:
+; AVX512F: # BB#0:
+; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
+; AVX512F-NEXT: vmovd %xmm0, %eax
+; AVX512F-NEXT: movw %ax, (%rdi)
+; AVX512F-NEXT: retq
+;
+; AVX512VL-LABEL: store_cvt_f32_to_i16:
+; AVX512VL: # BB#0:
+; AVX512VL-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512VL-NEXT: vmovd %xmm0, %eax
+; AVX512VL-NEXT: movw %ax, (%rdi)
+; AVX512VL-NEXT: retq
%1 = fptrunc float %a0 to half
%2 = bitcast half %1 to i16
store i16 %2, i16* %a1
@@ -3220,24 +3528,82 @@ define void @store_cvt_f32_to_i16(float
}
define void @store_cvt_4f32_to_4i16(<4 x float> %a0, <4 x i16>* %a1) nounwind {
-; ALL-LABEL: store_cvt_4f32_to_4i16:
-; ALL: # BB#0:
-; ALL-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
-; ALL-NEXT: vcvtps2ph $4, %xmm1, %xmm1
-; ALL-NEXT: vmovd %xmm1, %eax
-; ALL-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
-; ALL-NEXT: vcvtps2ph $4, %xmm1, %xmm1
-; ALL-NEXT: vmovd %xmm1, %ecx
-; ALL-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
-; ALL-NEXT: vcvtps2ph $4, %xmm1, %xmm1
-; ALL-NEXT: vmovd %xmm1, %edx
-; ALL-NEXT: vcvtps2ph $4, %xmm0, %xmm0
-; ALL-NEXT: vmovd %xmm0, %esi
-; ALL-NEXT: movw %si, (%rdi)
-; ALL-NEXT: movw %dx, 6(%rdi)
-; ALL-NEXT: movw %cx, 4(%rdi)
-; ALL-NEXT: movw %ax, 2(%rdi)
-; ALL-NEXT: retq
+; AVX1-LABEL: store_cvt_4f32_to_4i16:
+; AVX1: # BB#0:
+; AVX1-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX1-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX1-NEXT: vmovd %xmm1, %eax
+; AVX1-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
+; AVX1-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX1-NEXT: vmovd %xmm1, %ecx
+; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
+; AVX1-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX1-NEXT: vmovd %xmm1, %edx
+; AVX1-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX1-NEXT: vmovd %xmm0, %esi
+; AVX1-NEXT: movw %si, (%rdi)
+; AVX1-NEXT: movw %dx, 6(%rdi)
+; AVX1-NEXT: movw %cx, 4(%rdi)
+; AVX1-NEXT: movw %ax, 2(%rdi)
+; AVX1-NEXT: retq
+;
+; AVX2-LABEL: store_cvt_4f32_to_4i16:
+; AVX2: # BB#0:
+; AVX2-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX2-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX2-NEXT: vmovd %xmm1, %eax
+; AVX2-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
+; AVX2-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX2-NEXT: vmovd %xmm1, %ecx
+; AVX2-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
+; AVX2-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX2-NEXT: vmovd %xmm1, %edx
+; AVX2-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX2-NEXT: vmovd %xmm0, %esi
+; AVX2-NEXT: movw %si, (%rdi)
+; AVX2-NEXT: movw %dx, 6(%rdi)
+; AVX2-NEXT: movw %cx, 4(%rdi)
+; AVX2-NEXT: movw %ax, 2(%rdi)
+; AVX2-NEXT: retq
+;
+; AVX512F-LABEL: store_cvt_4f32_to_4i16:
+; AVX512F: # BB#0:
+; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
+; AVX512F-NEXT: vmovd %xmm1, %eax
+; AVX512F-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
+; AVX512F-NEXT: vmovd %xmm1, %ecx
+; AVX512F-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
+; AVX512F-NEXT: vmovd %xmm1, %edx
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
+; AVX512F-NEXT: vmovd %xmm0, %esi
+; AVX512F-NEXT: movw %si, (%rdi)
+; AVX512F-NEXT: movw %dx, 6(%rdi)
+; AVX512F-NEXT: movw %cx, 4(%rdi)
+; AVX512F-NEXT: movw %ax, 2(%rdi)
+; AVX512F-NEXT: retq
+;
+; AVX512VL-LABEL: store_cvt_4f32_to_4i16:
+; AVX512VL: # BB#0:
+; AVX512VL-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX512VL-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512VL-NEXT: vmovd %xmm1, %eax
+; AVX512VL-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
+; AVX512VL-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512VL-NEXT: vmovd %xmm1, %ecx
+; AVX512VL-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
+; AVX512VL-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512VL-NEXT: vmovd %xmm1, %edx
+; AVX512VL-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512VL-NEXT: vmovd %xmm0, %esi
+; AVX512VL-NEXT: movw %si, (%rdi)
+; AVX512VL-NEXT: movw %dx, 6(%rdi)
+; AVX512VL-NEXT: movw %cx, 4(%rdi)
+; AVX512VL-NEXT: movw %ax, 2(%rdi)
+; AVX512VL-NEXT: retq
%1 = fptrunc <4 x float> %a0 to <4 x half>
%2 = bitcast <4 x half> %1 to <4 x i16>
store <4 x i16> %2, <4 x i16>* %a1
@@ -3299,22 +3665,23 @@ define void @store_cvt_4f32_to_8i16_unde
;
; AVX512F-LABEL: store_cvt_4f32_to_8i16_undef:
; AVX512F: # BB#0:
-; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %eax
-; AVX512F-NEXT: shll $16, %eax
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm1
+; AVX512F-NEXT: movzwl %ax, %eax
+; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %ecx
-; AVX512F-NEXT: movzwl %cx, %ecx
+; AVX512F-NEXT: shll $16, %ecx
; AVX512F-NEXT: orl %eax, %ecx
-; AVX512F-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %eax
-; AVX512F-NEXT: shll $16, %eax
-; AVX512F-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512F-NEXT: movzwl %ax, %eax
+; AVX512F-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
; AVX512F-NEXT: vmovd %xmm0, %edx
-; AVX512F-NEXT: movzwl %dx, %edx
+; AVX512F-NEXT: shll $16, %edx
; AVX512F-NEXT: orl %eax, %edx
; AVX512F-NEXT: shlq $32, %rdx
; AVX512F-NEXT: orq %rcx, %rdx
@@ -3412,22 +3779,23 @@ define void @store_cvt_4f32_to_8i16_zero
;
; AVX512F-LABEL: store_cvt_4f32_to_8i16_zero:
; AVX512F: # BB#0:
-; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %eax
-; AVX512F-NEXT: shll $16, %eax
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm1
+; AVX512F-NEXT: movzwl %ax, %eax
+; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %ecx
-; AVX512F-NEXT: movzwl %cx, %ecx
+; AVX512F-NEXT: shll $16, %ecx
; AVX512F-NEXT: orl %eax, %ecx
-; AVX512F-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %eax
-; AVX512F-NEXT: shll $16, %eax
-; AVX512F-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512F-NEXT: movzwl %ax, %eax
+; AVX512F-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
; AVX512F-NEXT: vmovd %xmm0, %edx
-; AVX512F-NEXT: movzwl %dx, %edx
+; AVX512F-NEXT: shll $16, %edx
; AVX512F-NEXT: orl %eax, %edx
; AVX512F-NEXT: shlq $32, %rdx
; AVX512F-NEXT: orq %rcx, %rdx
@@ -3547,28 +3915,29 @@ define void @store_cvt_8f32_to_8i16(<8 x
;
; AVX512F-LABEL: store_cvt_8f32_to_8i16:
; AVX512F: # BB#0:
+; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
; AVX512F-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %r8d
; AVX512F-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %r9d
; AVX512F-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: vmovd %xmm1, %r10d
; AVX512F-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX512F-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm2, %xmm2
+; AVX512F-NEXT: vcvtps2ph $4, %zmm2, %ymm2
; AVX512F-NEXT: vmovd %xmm2, %r11d
; AVX512F-NEXT: vpermilpd {{.*#+}} xmm2 = xmm1[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm2, %xmm2
+; AVX512F-NEXT: vcvtps2ph $4, %zmm2, %ymm2
; AVX512F-NEXT: vmovd %xmm2, %eax
; AVX512F-NEXT: vpermilps {{.*#+}} xmm2 = xmm1[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm2, %xmm2
+; AVX512F-NEXT: vcvtps2ph $4, %zmm2, %ymm2
; AVX512F-NEXT: vmovd %xmm2, %ecx
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
; AVX512F-NEXT: vmovd %xmm0, %edx
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm0
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm0
; AVX512F-NEXT: vmovd %xmm0, %esi
; AVX512F-NEXT: movw %si, 8(%rdi)
; AVX512F-NEXT: movw %dx, (%rdi)
@@ -3760,55 +4129,55 @@ define void @store_cvt_16f32_to_16i16(<1
; AVX512F-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX512F-NEXT: vextractf64x4 $1, %zmm0, %ymm2
; AVX512F-NEXT: vextractf128 $1, %ymm2, %xmm3
-; AVX512F-NEXT: vcvtps2ph $4, %xmm3, %xmm4
+; AVX512F-NEXT: vcvtps2ph $4, %zmm3, %ymm4
; AVX512F-NEXT: vmovd %xmm4, %eax
-; AVX512F-NEXT: vcvtps2ph $4, %xmm2, %xmm4
+; AVX512F-NEXT: vcvtps2ph $4, %zmm2, %ymm4
; AVX512F-NEXT: movw %ax, 24(%rdi)
; AVX512F-NEXT: vmovd %xmm4, %eax
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm4
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm4
; AVX512F-NEXT: movw %ax, 16(%rdi)
; AVX512F-NEXT: vmovd %xmm4, %eax
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm4
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm4
; AVX512F-NEXT: movw %ax, 8(%rdi)
; AVX512F-NEXT: vmovd %xmm4, %eax
; AVX512F-NEXT: vpermilps {{.*#+}} xmm4 = xmm3[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm4, %xmm4
+; AVX512F-NEXT: vcvtps2ph $4, %zmm4, %ymm4
; AVX512F-NEXT: movw %ax, (%rdi)
; AVX512F-NEXT: vmovd %xmm4, %eax
; AVX512F-NEXT: vpermilpd {{.*#+}} xmm4 = xmm3[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm4, %xmm4
+; AVX512F-NEXT: vcvtps2ph $4, %zmm4, %ymm4
; AVX512F-NEXT: movw %ax, 30(%rdi)
; AVX512F-NEXT: vmovd %xmm4, %eax
; AVX512F-NEXT: vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm4, %xmm4
+; AVX512F-NEXT: vcvtps2ph $4, %zmm4, %ymm4
; AVX512F-NEXT: vmovshdup {{.*#+}} xmm3 = xmm3[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm3, %xmm3
+; AVX512F-NEXT: vcvtps2ph $4, %zmm3, %ymm3
; AVX512F-NEXT: movw %ax, 28(%rdi)
; AVX512F-NEXT: vmovd %xmm3, %eax
; AVX512F-NEXT: vpermilps {{.*#+}} xmm3 = xmm2[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm3, %xmm3
+; AVX512F-NEXT: vcvtps2ph $4, %zmm3, %ymm3
; AVX512F-NEXT: movw %ax, 26(%rdi)
; AVX512F-NEXT: vmovd %xmm3, %eax
; AVX512F-NEXT: vpermilpd {{.*#+}} xmm3 = xmm2[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm3, %xmm3
+; AVX512F-NEXT: vcvtps2ph $4, %zmm3, %ymm3
; AVX512F-NEXT: movw %ax, 22(%rdi)
; AVX512F-NEXT: vmovd %xmm3, %eax
; AVX512F-NEXT: vpermilpd {{.*#+}} xmm3 = xmm0[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm3, %xmm3
+; AVX512F-NEXT: vcvtps2ph $4, %zmm3, %ymm3
; AVX512F-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
+; AVX512F-NEXT: vcvtps2ph $4, %zmm0, %ymm0
; AVX512F-NEXT: vmovshdup {{.*#+}} xmm2 = xmm2[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm2, %xmm2
+; AVX512F-NEXT: vcvtps2ph $4, %zmm2, %ymm2
; AVX512F-NEXT: movw %ax, 20(%rdi)
; AVX512F-NEXT: vmovd %xmm2, %eax
; AVX512F-NEXT: vpermilps {{.*#+}} xmm2 = xmm1[3,1,2,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm2, %xmm2
+; AVX512F-NEXT: vcvtps2ph $4, %zmm2, %ymm2
; AVX512F-NEXT: movw %ax, 18(%rdi)
; AVX512F-NEXT: vmovd %xmm2, %eax
; AVX512F-NEXT: vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm2, %xmm2
+; AVX512F-NEXT: vcvtps2ph $4, %zmm2, %ymm2
; AVX512F-NEXT: vpermilpd {{.*#+}} xmm1 = xmm1[1,0]
-; AVX512F-NEXT: vcvtps2ph $4, %xmm1, %xmm1
+; AVX512F-NEXT: vcvtps2ph $4, %zmm1, %ymm1
; AVX512F-NEXT: movw %ax, 14(%rdi)
; AVX512F-NEXT: vmovd %xmm1, %eax
; AVX512F-NEXT: movw %ax, 12(%rdi)
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