[llvm] r281846 - Change the order of the splitted store from high - low to low - high.

[Wei Mi via llvm-commits]

Author: wmi
Date: Sun Sep 18 01:10:32 2016
New Revision: 281846

URL: http://llvm.org/viewvc/llvm-project?rev=281846&view=rev
Log:
Change the order of the splitted store from high - low to low - high.
It is a trivial change which could make the testcase easier to be reused
for the store splitting in CodeGenPrepare.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/split-store.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=281846&r1=281845&r2=281846&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Sep 18 01:10:32 2016
@@ -12330,10 +12330,10 @@ SDValue DAGCombiner::splitMergedValStore
                   DAG.getConstant(HalfValBitSize / 8, DL, Ptr.getValueType()));
   // Higher value store.
   SDValue St1 =
-      DAG.getStore(Chain, DL, Hi, Ptr,
+      DAG.getStore(St0, DL, Hi, Ptr,
                    ST->getPointerInfo().getWithOffset(HalfValBitSize / 8),
                    Alignment / 2, MMOFlags, AAInfo);
-  return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, St0, St1);
+  return St1;
 }
 
 SDValue DAGCombiner::visitINSERT_VECTOR_ELT(SDNode *N) {

Modified: llvm/trunk/test/CodeGen/X86/split-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/split-store.ll?rev=281846&r1=281845&r2=281846&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/split-store.ll (original)
+++ llvm/trunk/test/CodeGen/X86/split-store.ll Sun Sep 18 01:10:32 2016
@@ -1,8 +1,8 @@
 ; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
 
 ; CHECK-LABEL: int32_float_pair
-; CHECK: movss %xmm0, 4(%rsi)
 ; CHECK: movl %edi, (%rsi)
+; CHECK: movss %xmm0, 4(%rsi)
 define void @int32_float_pair(i32 %tmp1, float %tmp2, i64* %ref.tmp) {
 entry:
   %t0 = bitcast float %tmp2 to i32
@@ -15,8 +15,8 @@ entry:
 }
 
 ; CHECK-LABEL: float_int32_pair
-; CHECK: movl %edi, 4(%rsi)
 ; CHECK: movss %xmm0, (%rsi)
+; CHECK: movl %edi, 4(%rsi)
 define void @float_int32_pair(float %tmp1, i32 %tmp2, i64* %ref.tmp) {
 entry:
   %t0 = bitcast float %tmp1 to i32
@@ -29,9 +29,9 @@ entry:
 }
 
 ; CHECK-LABEL: int16_float_pair
-; CHECK: movss %xmm0, 4(%rsi)
 ; CHECK: movzwl	%di, %eax
 ; CHECK: movl %eax, (%rsi)
+; CHECK: movss %xmm0, 4(%rsi)
 define void @int16_float_pair(i16 signext %tmp1, float %tmp2, i64* %ref.tmp) {
 entry:
   %t0 = bitcast float %tmp2 to i32
@@ -44,9 +44,9 @@ entry:
 }
 
 ; CHECK-LABEL: int8_float_pair
-; CHECK: movss %xmm0, 4(%rsi)
 ; CHECK: movzbl	%dil, %eax
 ; CHECK: movl %eax, (%rsi)
+; CHECK: movss %xmm0, 4(%rsi)
 define void @int8_float_pair(i8 signext %tmp1, float %tmp2, i64* %ref.tmp) {
 entry:
   %t0 = bitcast float %tmp2 to i32