[PATCH] D24672: AMDGPU/SI: Eliminate more instructions that truncate inputs to 24-bit ops
Tom Stellard via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 16 16:31:59 PDT 2016
tstellarAMD added inline comments.
================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2441-2449
@@ -2440,1 +2440,11 @@
+static SDValue reduce24BitOperand(SDValue Op, SelectionDAG &DAG) {
+
+ if (Op.getOpcode() == ISD::AND &&
+ dyn_cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()
+ .countLeadingZeros() == 8)
+ return Op.getOperand(0);
+
+ return Op;
+}
+
----------------
arsenm wrote:
> arsenm wrote:
> > This looks like an overly specific version of computeKnownBits. I was trying to figure out how to factor SimplifyDemandedBits to allow checking multiple uses but never got around to trying it
> For and this could also be >= 8
I looked into it, but I thought the cost of doing that would be too high. One idea I had ws to add an extra parameter for when you wanted to consider multiple uses.
https://reviews.llvm.org/D24672
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