[PATCH] D24672: AMDGPU/SI: Eliminate more instructions that truncate inputs to 24-bit ops

[Matt Arsenault via llvm-commits]

arsenm added inline comments.

================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2441-2449
@@ -2440,1 +2440,11 @@
 
+static SDValue reduce24BitOperand(SDValue Op, SelectionDAG &DAG) {
+
+  if (Op.getOpcode() == ISD::AND &&
+      dyn_cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()
+      .countLeadingZeros() == 8)
+    return Op.getOperand(0);
+
+  return Op;
+}
+
----------------
This looks like an overly specific version of computeKnownBits. I was trying to figure out how to factor SimplifyDemandedBits to allow checking multiple uses but never got around to trying it

================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2444
@@ +2443,3 @@
+  if (Op.getOpcode() == ISD::AND &&
+      dyn_cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()
+      .countLeadingZeros() == 8)
----------------
unchecked dyn_cast

================
Comment at: lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2459-2462
@@ +2458,6 @@
+  bool Simplified = simplifyI24(N0, DCI);
+  Simplified |= simplifyI24(N1, DCI);
+
+  if (Simplified)
+    return true;
+
----------------
This can early exit if the first one failed


https://reviews.llvm.org/D24672