[llvm] r281735 - [AArch64][GlobalISel] Test default regbank mapping for G_ICMP.

[Ahmed Bougacha via llvm-commits]

Author: ab
Date: Fri Sep 16 09:44:54 2016
New Revision: 281735

URL: http://llvm.org/viewvc/llvm-project?rev=281735&view=rev
Log:
[AArch64][GlobalISel] Test default regbank mapping for G_ICMP.

Also relax a RegisterBankInfo verifier check that's incompatible with
1-bit mappings.

Modified:
    llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir

Modified: llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp?rev=281735&r1=281734&r2=281735&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp Fri Sep 16 09:44:54 2016
@@ -390,7 +390,7 @@ void RegisterBankInfo::PartialMapping::d
 bool RegisterBankInfo::PartialMapping::verify() const {
   assert(RegBank && "Register bank not set");
   assert(Length && "Empty mapping");
-  assert((StartIdx < getHighBitIdx()) && "Overflow, switch to APInt?");
+  assert((StartIdx <= getHighBitIdx()) && "Overflow, switch to APInt?");
   // Check if the minimum width fits into RegBank.
   assert(RegBank->getSize() >= Length && "Register bank too small for Mask");
   return true;

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir?rev=281735&r1=281734&r2=281735&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir Fri Sep 16 09:44:54 2016
@@ -35,6 +35,9 @@
   define void @test_constant_s32() { ret void }
   define void @test_constant_p0() { ret void }
 
+  define void @test_icmp_s32() { ret void }
+  define void @test_icmp_p0() { ret void }
+
   define void @test_frame_index_p0() {
     %ptr0 = alloca i64
     ret void
@@ -494,6 +497,44 @@ body: |
 ...
 
 ---
+# CHECK-LABEL: name: test_icmp_s32
+name:            test_icmp_s32
+legalized:       true
+# CHECK: registers:
+# CHECK:   - { id: 0, class: gpr }
+# CHECK:   - { id: 1, class: gpr }
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+body: |
+  bb.0:
+    liveins: %w0
+    ; CHECK:      %0(s32) = COPY %w0
+    ; CHECK:      %1(s1) = G_ICMP intpred(ne), %0(s32), %0
+    %0(s32) = COPY %w0
+    %1(s1) = G_ICMP intpred(ne), %0, %0
+...
+
+---
+# CHECK-LABEL: name: test_icmp_p0
+name:            test_icmp_p0
+legalized:       true
+# CHECK: registers:
+# CHECK:   - { id: 0, class: gpr }
+# CHECK:   - { id: 1, class: gpr }
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+body: |
+  bb.0:
+    liveins: %x0
+    ; CHECK:      %0(p0) = COPY %x0
+    ; CHECK:      %1(s1) = G_ICMP intpred(ne), %0(p0), %0
+    %0(p0) = COPY %x0
+    %1(s1) = G_ICMP intpred(ne), %0, %0
+...
+
+---
 # CHECK-LABEL: name: test_frame_index_p0
 name:            test_frame_index_p0
 legalized:       true