[PATCH] D24345: [X86][SSE] Improve recognition of i64 sitofp conversions can be performed as i32 (PR29078)

[Simon Pilgrim via llvm-commits]

RKSimon added a comment.

Thanks Zvi and Andrea


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Comment at: test/CodeGen/X86/sse-fsignum.ll:42-45
@@ -41,6 +41,6 @@
 ; AVX1-NEXT:    vpextrq $1, %xmm2, %rax
-; AVX1-NEXT:    vcvtsi2sdq %rax, %xmm3, %xmm3
-; AVX1-NEXT:    vmovq %xmm2, %rax
-; AVX1-NEXT:    vcvtsi2sdq %rax, %xmm4, %xmm2
-; AVX1-NEXT:    vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
+; AVX1-NEXT:    vmovq %xmm2, %rcx
+; AVX1-NEXT:    vmovd %ecx, %xmm2
+; AVX1-NEXT:    vpinsrd $1, %eax, %xmm2, %xmm2
+; AVX1-NEXT:    vcvtdq2pd %xmm2, %xmm2
 ; AVX1-NEXT:    vcmpltpd %xmm0, %xmm1, %xmm0
----------------
andreadb wrote:
> Isn't the vmovq+vmovd sequence redundant?
Yes that was my comment about the signum64a codegen - we need to more aggressively use truncateVectorCompareWithPACKSS - at the moment its only used to truncate whole 128-bit vectors, when we could use it on subvectors as well. In fact we may even be able to generalize it to work with ComputeNumSignBits instead of just vector comparison results.


Repository:
  rL LLVM

https://reviews.llvm.org/D24345