[PATCH] D24556: [mips] Macro expansion for ld, sd for O32

[Simon Dardis via llvm-commits]

sdardis created this revision.
sdardis added reviewers: vkalintiris, zoran.jovanovic.
sdardis added subscribers: llvm-commits, seanbruno.
sdardis set the repository for this revision to rL LLVM.
Herald added a subscriber: sdardis.

ld and sd when assembled for the O32 ABI expand to a pair of 32 bit word loads
or stores using the specified source or destination register and the next
register.

This patch does not add support for the cases where the offset is greater than
a 16 bit signed immediate as that would lead to a wrong/misleading error
message as the assembler would report "instruction requires a CPU feature
not currently enabled" for ld & sd for MIPS64 when their offset is not a signed
16 bit number.

This fixes PR/29159.

Thanks to Sean Bruno for reporting this issue!

Repository:
  rL LLVM

https://reviews.llvm.org/D24556

Files:
  lib/Target/Mips/AsmParser/MipsAsmParser.cpp
  lib/Target/Mips/MipsInstrInfo.td
  test/MC/Mips/macro-ld-sd.s
  test/MC/Mips/mips1/invalid-mips3.s
  test/MC/Mips/mips1/invalid-mips4.s
  test/MC/Mips/mips2/invalid-mips3.s
  test/MC/Mips/mips2/invalid-mips4.s

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