[PATCH] D24125: [AMDGPU] Promote uniform i16 ops to i32 ops

[Tom Stellard via llvm-commits]

tstellarAMD added inline comments.

================
Comment at: lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp:51
@@ +50,3 @@
+  /// otherwise.
+  bool isSigned(const ICmpInst &I) const {
+    return I.getPredicate() == ICmpInst::ICMP_SGT ||
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CmpInst has an isSigned() memeber function that you can use instead.

================
Comment at: lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp:62
@@ +61,3 @@
+    return isa<ICmpInst>(I.getOperand(0)) ?
+        isSigned(*cast<ICmpInst>(I.getOperand(0))) : false;
+  }
----------------
Same thing here.

================
Comment at: test/CodeGen/AMDGPU/ctlz.ll:247
@@ -246,3 +246,3 @@
 ; SI: v_ffbh_u32_e32 [[FFBH:v[0-9]+]], [[VAL]]
-; SI: buffer_store_short [[FFBH]],
+; SI: buffer_store_short
  define void @v_ctlz_i16_sel_eq_neg1(i16 addrspace(1)* noalias %out, i16 addrspace(1)* noalias %valptr) nounwind {
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Did you mean to change this?


https://reviews.llvm.org/D24125