[PATCH] D24403: [ELF/AArch64] Support some of R_AARCH64_MOVW_UABS_* relocations
Eugene Leviant via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 12 03:11:18 PDT 2016
This revision was automatically updated to reflect the committed changes.
Closed by commit rL281202: [ELF/AArch64] Implement some UABS relocs (authored by evgeny777).
Changed prior to commit:
https://reviews.llvm.org/D24403?vs=70848&id=70987#toc
Repository:
rL LLVM
https://reviews.llvm.org/D24403
Files:
lld/trunk/ELF/Target.cpp
lld/trunk/test/ELF/Inputs/uabs_label.s
lld/trunk/test/ELF/aarch64-relocs.s
Index: lld/trunk/ELF/Target.cpp
===================================================================
--- lld/trunk/ELF/Target.cpp
+++ lld/trunk/ELF/Target.cpp
@@ -1357,6 +1357,18 @@
case R_AARCH64_LDST64_ABS_LO12_NC:
or32le(Loc, (Val & 0xFF8) << 7);
break;
+ case R_AARCH64_MOVW_UABS_G0_NC:
+ or32le(Loc, (Val & 0xFFFF) << 5);
+ break;
+ case R_AARCH64_MOVW_UABS_G1_NC:
+ or32le(Loc, (Val & 0xFFFF0000) >> 11);
+ break;
+ case R_AARCH64_MOVW_UABS_G2_NC:
+ or32le(Loc, (Val & 0xFFFF00000000) >> 27);
+ break;
+ case R_AARCH64_MOVW_UABS_G3:
+ or32le(Loc, (Val & 0xFFFF000000000000) >> 43);
+ break;
case R_AARCH64_TSTBR14:
checkInt<16>(Val, Type);
or32le(Loc, (Val & 0xFFFC) << 3);
Index: lld/trunk/test/ELF/aarch64-relocs.s
===================================================================
--- lld/trunk/test/ELF/aarch64-relocs.s
+++ lld/trunk/test/ELF/aarch64-relocs.s
@@ -1,5 +1,6 @@
# RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %t
-# RUN: ld.lld %t -o %t2
+# RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %p/Inputs/uabs_label.s -o %t2.o
+# RUN: ld.lld %t %t2.o -o %t2
# RUN: llvm-objdump -d %t2 | FileCheck %s
# REQUIRES: aarch64
@@ -150,3 +151,20 @@
# CHECK: Disassembly of section .R_AARCH64_LDST16_ABS_LO12_NC:
# CHECK-NEXT: ldst16:
# CHECK-NEXT: 11054: 71 b2 40 7d ldr h17, [x19, #88]
+
+.section .R_AARCH64_MOVW_UABS,"ax", at progbits
+movz1:
+ movk x12, #:abs_g0_nc:uabs_label
+ movk x13, #:abs_g1_nc:uabs_label
+ movk x14, #:abs_g2_nc:uabs_label
+ movz x15, #:abs_g3:uabs_label
+ movk x16, #:abs_g3:uabs_label
+
+## 4222124650659840 == (0xF << 48)
+# CHECK: Disassembly of section .R_AARCH64_MOVW_UABS:
+# CHECK-NEXT: movz1:
+# CHECK-NEXT: 8c 01 80 f2 movk x12, #12
+# CHECK-NEXT: ad 01 a0 f2 movk x13, #13, lsl #16
+# CHECK-NEXT: ce 01 c0 f2 movk x14, #14, lsl #32
+# CHECK-NEXT: ef 01 e0 d2 mov x15, #4222124650659840
+# CHECK-NEXT: f0 01 e0 f2 movk x16, #15, lsl #48
Index: lld/trunk/test/ELF/Inputs/uabs_label.s
===================================================================
--- lld/trunk/test/ELF/Inputs/uabs_label.s
+++ lld/trunk/test/ELF/Inputs/uabs_label.s
@@ -0,0 +1,4 @@
+# Sample label to test R_AARCH64_MOVW_UABS relocations
+
+.globl uabs_label
+uabs_label = 0xF000E000D000C
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