[PATCH] D24433: Delete dead code in the SelectionDAG headers (NFC)

[Vedant Kumar via llvm-commits]

vsk created this revision.
vsk added reviewers: bogner, delena.
vsk added a subscriber: llvm-commits.

I tested this with "ninja check-llvm-codegen" on a Release build with
all architectures enabled.

Found with llvm-cov.

https://reviews.llvm.org/D24433

Files:
  include/llvm/CodeGen/SelectionDAG.h
  include/llvm/CodeGen/SelectionDAGNodes.h

Index: include/llvm/CodeGen/SelectionDAGNodes.h
===================================================================
--- include/llvm/CodeGen/SelectionDAGNodes.h
+++ include/llvm/CodeGen/SelectionDAGNodes.h
@@ -163,8 +163,6 @@
   inline unsigned getNumOperands() const;
   inline const SDValue &getOperand(unsigned i) const;
   inline uint64_t getConstantOperandVal(unsigned i) const;
-  inline bool isTargetMemoryOpcode() const;
-  inline bool isTargetOpcode() const;
   inline bool isMachineOpcode() const;
   inline bool isUndef() const;
   inline unsigned getMachineOpcode() const;
@@ -371,14 +369,6 @@
   bool hasAllowReciprocal() const { return AllowReciprocal; }
   bool hasVectorReduction() const { return VectorReduction; }
 
-  /// Return a raw encoding of the flags.
-  /// This function should only be used to add data to the NodeID value.
-  unsigned getRawFlags() const {
-    return (NoUnsignedWrap << 0) | (NoSignedWrap << 1) | (Exact << 2) |
-    (UnsafeAlgebra << 3) | (NoNaNs << 4) | (NoInfs << 5) |
-    (NoSignedZeros << 6) | (AllowReciprocal << 7);
-  }
-
   /// Clear any flags in this flag set that aren't also set in Flags.
   void intersectWith(const SDNodeFlags *Flags) {
     NoUnsignedWrap &= Flags->NoUnsignedWrap;
@@ -949,12 +939,6 @@
 inline uint64_t SDValue::getConstantOperandVal(unsigned i) const {
   return Node->getConstantOperandVal(i);
 }
-inline bool SDValue::isTargetOpcode() const {
-  return Node->isTargetOpcode();
-}
-inline bool SDValue::isTargetMemoryOpcode() const {
-  return Node->isTargetMemoryOpcode();
-}
 inline bool SDValue::isMachineOpcode() const {
   return Node->isMachineOpcode();
 }
@@ -2185,17 +2169,6 @@
   inline bool isNON_TRUNCStore(const SDNode *N) {
     return isa<StoreSDNode>(N) && !cast<StoreSDNode>(N)->isTruncatingStore();
   }
-
-  /// Returns true if the specified node is a truncating store.
-  inline bool isTRUNCStore(const SDNode *N) {
-    return isa<StoreSDNode>(N) && cast<StoreSDNode>(N)->isTruncatingStore();
-  }
-
-  /// Returns true if the specified node is an unindexed store.
-  inline bool isUNINDEXEDStore(const SDNode *N) {
-    return isa<StoreSDNode>(N) &&
-      cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
-  }
 }
 
 } // end llvm namespace
Index: include/llvm/CodeGen/SelectionDAG.h
===================================================================
--- include/llvm/CodeGen/SelectionDAG.h
+++ include/llvm/CodeGen/SelectionDAG.h
@@ -513,12 +513,6 @@
                         bool isTarget = false);
   SDValue getConstantFP(const ConstantFP &CF, const SDLoc &DL, EVT VT,
                         bool isTarget = false);
-  SDValue getTargetConstantFP(double Val, const SDLoc &DL, EVT VT) {
-    return getConstantFP(Val, DL, VT, true);
-  }
-  SDValue getTargetConstantFP(const APFloat &Val, const SDLoc &DL, EVT VT) {
-    return getConstantFP(Val, DL, VT, true);
-  }
   SDValue getTargetConstantFP(const ConstantFP &Val, const SDLoc &DL, EVT VT) {
     return getConstantFP(Val, DL, VT, true);
   }
@@ -666,11 +660,6 @@
     return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
   }
 
-  /// Return a splat ISD::BUILD_VECTOR node, but with Op's SDLoc.
-  SDValue getSplatBuildVector(EVT VT, SDValue Op) {
-    return getSplatBuildVector(VT, SDLoc(Op), Op);
-  }
-
   /// \brief Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to
   /// the shuffle node in input but with swapped operands.
   ///


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