[PATCH] D24406: [Thumb] Teach ISel how to lower compares of AND bitmasks efficiently

[James Molloy via llvm-commits]

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For the common pattern (CMPZ (AND x, #bitmask), #0), we can do some more efficient instruction selection if the bitmask is one consecutive sequence of set bits (32 - clz(bm) - ctz(bm) == popcount(bm)).

1) If the bitmask touches the LSB, then we can remove all the upper bits and set the flags by doing one LSLS.
2) If the bitmask touches the MSB, then we can remove all the lower bits and set the flags with one LSRS.
3) If the bitmask has popcount == 1 (only one set bit), we can shift that bit into the sign bit with one LSLS and change the condition query from NE/EQ to MI/PL (we could also implement this by shifting into the carry bit and branching on BCC/BCS).
4) Otherwise, we can emit a sequence of LSLS+LSRS to remove the upper and lower zero bits of the mask.

1-3 require only one 16-bit instruction and can elide the CMP. 4 requires two 16-bit instructions but can elide the CMP and doesn't require materializing a complex immediate, so is also a win.

Repository:
  rL LLVM

https://reviews.llvm.org/D24406

Files:
  lib/Target/ARM/ARMBaseInstrInfo.cpp
  lib/Target/ARM/ARMISelDAGToDAG.cpp
  test/CodeGen/ARM/arm-and-tst-peephole.ll
  test/CodeGen/ARM/arm-shrink-wrapping.ll
  test/CodeGen/ARM/call-tc.ll
  test/CodeGen/ARM/debug-info-branch-folding.ll
  test/CodeGen/Thumb/thumb-shrink-wrapping.ll
  test/CodeGen/Thumb2/float-ops.ll

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