[llvm] r281047 - [Sparc][LEON] Removed the parts of the errata fixes implemented using inline assembly as this is not the desired behaviour for end-users. Small change to a unit test to implement this without requiring the inline assembly.
Chris Dewhurst via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 9 07:16:51 PDT 2016
Author: lerochris
Date: Fri Sep 9 09:16:51 2016
New Revision: 281047
URL: http://llvm.org/viewvc/llvm-project?rev=281047&view=rev
Log:
[Sparc][LEON] Removed the parts of the errata fixes implemented using inline assembly as this is not the desired behaviour for end-users. Small change to a unit test to implement this without requiring the inline assembly.
Removed:
llvm/trunk/test/CodeGen/SPARC/LeonFixFSMULDPassUT.ll
Modified:
llvm/trunk/lib/Target/Sparc/LeonPasses.cpp
llvm/trunk/test/CodeGen/SPARC/LeonInsertNOPLoadPassUT.ll
llvm/trunk/test/CodeGen/SPARC/LeonReplaceFMULSPassUT.ll
Modified: llvm/trunk/lib/Target/Sparc/LeonPasses.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/LeonPasses.cpp?rev=281047&r1=281046&r2=281047&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/LeonPasses.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/LeonPasses.cpp Fri Sep 9 09:16:51 2016
@@ -89,15 +89,6 @@ bool InsertNOPLoad::runOnMachineFunction
MachineBasicBlock::iterator NMBBI = std::next(MBBI);
BuildMI(MBB, NMBBI, DL, TII.get(SP::NOP));
Modified = true;
- } else if (MI.isInlineAsm()) {
- // Look for an inline ld or ldf instruction.
- StringRef AsmString =
- MI.getOperand(InlineAsm::MIOp_AsmString).getSymbolName();
- if (AsmString.startswith_lower("ld")) {
- MachineBasicBlock::iterator NMBBI = std::next(MBBI);
- BuildMI(MBB, NMBBI, DL, TII.get(SP::NOP));
- Modified = true;
- }
}
}
}
@@ -147,32 +138,6 @@ bool FixFSMULD::runOnMachineFunction(Mac
Reg1Index = MI.getOperand(0).getReg();
Reg2Index = MI.getOperand(1).getReg();
Reg3Index = MI.getOperand(2).getReg();
- } else if (MI.isInlineAsm()) {
- std::string AsmString(
- MI.getOperand(InlineAsm::MIOp_AsmString).getSymbolName());
- std::string FMULSOpCoode("fsmuld");
- std::transform(AsmString.begin(), AsmString.end(), AsmString.begin(),
- ::tolower);
- if (AsmString.find(FMULSOpCoode) ==
- 0) { // this is an inline FSMULD instruction
-
- unsigned StartOp = InlineAsm::MIOp_FirstOperand;
-
- // extracts the registers from the inline assembly instruction
- for (unsigned i = StartOp, e = MI.getNumOperands(); i != e; ++i) {
- const MachineOperand &MO = MI.getOperand(i);
- if (MO.isReg()) {
- if (Reg1Index == UNASSIGNED_INDEX)
- Reg1Index = MO.getReg();
- else if (Reg2Index == UNASSIGNED_INDEX)
- Reg2Index = MO.getReg();
- else if (Reg3Index == UNASSIGNED_INDEX)
- Reg3Index = MO.getReg();
- }
- if (Reg3Index != UNASSIGNED_INDEX)
- break;
- }
- }
}
if (Reg1Index != UNASSIGNED_INDEX && Reg2Index != UNASSIGNED_INDEX &&
@@ -262,31 +227,6 @@ bool ReplaceFMULS::runOnMachineFunction(
Reg1Index = MI.getOperand(0).getReg();
Reg2Index = MI.getOperand(1).getReg();
Reg3Index = MI.getOperand(2).getReg();
- } else if (MI.isInlineAsm()) {
- std::string AsmString(
- MI.getOperand(InlineAsm::MIOp_AsmString).getSymbolName());
- std::string FMULSOpCoode("fmuls");
- std::transform(AsmString.begin(), AsmString.end(), AsmString.begin(),
- ::tolower);
- if (AsmString.find(FMULSOpCoode) ==
- 0) { // this is an inline FMULS instruction
- unsigned StartOp = InlineAsm::MIOp_FirstOperand;
-
- // extracts the registers from the inline assembly instruction
- for (unsigned i = StartOp, e = MI.getNumOperands(); i != e; ++i) {
- const MachineOperand &MO = MI.getOperand(i);
- if (MO.isReg()) {
- if (Reg1Index == UNASSIGNED_INDEX)
- Reg1Index = MO.getReg();
- else if (Reg2Index == UNASSIGNED_INDEX)
- Reg2Index = MO.getReg();
- else if (Reg3Index == UNASSIGNED_INDEX)
- Reg3Index = MO.getReg();
- }
- if (Reg3Index != UNASSIGNED_INDEX)
- break;
- }
- }
}
if (Reg1Index != UNASSIGNED_INDEX && Reg2Index != UNASSIGNED_INDEX &&
@@ -368,22 +308,6 @@ bool FixAllFDIVSQRT::runOnMachineFunctio
MachineInstr &MI = *MBBI;
unsigned Opcode = MI.getOpcode();
- if (MI.isInlineAsm()) {
- std::string AsmString(
- MI.getOperand(InlineAsm::MIOp_AsmString).getSymbolName());
- std::string FSQRTDOpCode("fsqrtd");
- std::string FDIVDOpCode("fdivd");
- std::transform(AsmString.begin(), AsmString.end(), AsmString.begin(),
- ::tolower);
- if (AsmString.find(FSQRTDOpCode) ==
- 0) { // this is an inline fsqrts instruction
- Opcode = SP::FSQRTD;
- } else if (AsmString.find(FDIVDOpCode) ==
- 0) { // this is an inline fsqrts instruction
- Opcode = SP::FDIVD;
- }
- }
-
// Note: FDIVS and FSQRTS cannot be generated when this erratum fix is
// switched on so we don't need to check for them here. They will
// already have been converted to FSQRTD or FDIVD earlier in the
Removed: llvm/trunk/test/CodeGen/SPARC/LeonFixFSMULDPassUT.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/LeonFixFSMULDPassUT.ll?rev=281046&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/SPARC/LeonFixFSMULDPassUT.ll (original)
+++ llvm/trunk/test/CodeGen/SPARC/LeonFixFSMULDPassUT.ll (removed)
@@ -1,31 +0,0 @@
-; RUN: llc %s -O0 -march=sparc -mcpu=ut699 -o - | FileCheck %s
-
-; CHECK-LABEL: test_fix_fsmuld_1
-; CHECK: fstod %f20, %f2
-; CHECK: fstod %f21, %f3
-; CHECK: fmuld %f2, %f3, %f8
-; CHECK: fstod %f20, %f0
-define double @test_fix_fsmuld_1() {
-entry:
- %a = alloca float, align 4
- %b = alloca float, align 4
- store float 0x402ECCCCC0000000, float* %a, align 4
- store float 0x4022333340000000, float* %b, align 4
- %0 = load float, float* %b, align 4
- %1 = load float, float* %a, align 4
- %mul = tail call double asm sideeffect "fsmuld $0, $1, $2", "={f20},{f21},{f8}"(float* %a, float* %b)
-
- ret double %mul
-}
-
-; CHECK-LABEL: test_fix_fsmuld_2
-; CHECK: fstod %f20, %f2
-; CHECK: fstod %f21, %f3
-; CHECK: fmuld %f2, %f3, %f8
-; CHECK: fstod %f20, %f0
-define double @test_fix_fsmuld_2(float* %a, float* %b) {
-entry:
- %mul = tail call double asm sideeffect "fsmuld $0, $1, $2", "={f20},{f21},{f8}"(float* %a, float* %b)
-
- ret double %mul
-}
Modified: llvm/trunk/test/CodeGen/SPARC/LeonInsertNOPLoadPassUT.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/LeonInsertNOPLoadPassUT.ll?rev=281047&r1=281046&r2=281047&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SPARC/LeonInsertNOPLoadPassUT.ll (original)
+++ llvm/trunk/test/CodeGen/SPARC/LeonInsertNOPLoadPassUT.ll Fri Sep 9 09:16:51 2016
@@ -19,25 +19,3 @@ define i32 @ld_i32_test(i32 *%p) {
%res = load i32, i32* %p
ret i32 %res
}
-
-; CHECK-LABEL: ld_inlineasm_test_1
-; CHECK: ld [%o0], %o0
-; CHECK-NEXT: !NO_APP
-; CHECK-NEXT: nop
-define float @ld_inlineasm_test_1(float* %a) {
-entry:
- %res = tail call float asm sideeffect "ld [$1], $0", "=r,r"(float* %a)
-
- ret float %res
-}
-
-; CHECK-LABEL: ld_inlineasm_test_2
-; CHECK: ld [%o0], %o0
-; CHECK-NEXT: !NO_APP
-; CHECK-NEXT: nop
-define i32 @ld_inlineasm_test_2(i32* %a) {
-entry:
- %res = tail call i32 asm sideeffect "ld [$1], $0", "=r,r"(i32* %a)
-
- ret i32 %res
-}
\ No newline at end of file
Modified: llvm/trunk/test/CodeGen/SPARC/LeonReplaceFMULSPassUT.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/LeonReplaceFMULSPassUT.ll?rev=281047&r1=281046&r2=281047&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SPARC/LeonReplaceFMULSPassUT.ll (original)
+++ llvm/trunk/test/CodeGen/SPARC/LeonReplaceFMULSPassUT.ll Fri Sep 9 09:16:51 2016
@@ -1,19 +1,13 @@
-; RUN: llc %s -O0 -march=sparc -mcpu=ut699 -o - | FileCheck %s
+; RUN: llc %s -O0 -march=sparc -mattr=replacefmuls -o - | FileCheck %s
-; CHECK-LABEL: fmuls_fix_test
-; CHECK: fstod %f20, %f2
-; CHECK: fstod %f21, %f3
-; CHECK: fmuld %f2, %f3, %f8
-; CHECK: fstod %f20, %f0
-define double @fmuls_fix_test() {
+; CHECK-LABEL: test_replace_fmuls
+; CHECK: fsmuld %f1, %f0, %f2
+; CHECK: fdtos %f2, %f0
+; NOFIX-LABEL: test_replace_fmuls
+; NOFIX: fmuls %f1, %f0, %f0
+define float @test_replace_fmuls(float %a, float %b) {
entry:
- %a = alloca float, align 4
- %b = alloca float, align 4
- store float 0x402ECCCCC0000000, float* %a, align 4
- store float 0x4022333340000000, float* %b, align 4
- %0 = load float, float* %b, align 4
- %1 = load float, float* %a, align 4
- %mul = tail call double asm sideeffect "fmuls $0, $1, $2", "={f20},{f21},{f8}"(float* %a, float* %b)
+ %mul = fmul float %a, %b
- ret double %mul
+ ret float %mul
}
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