[llvm] r280973 - [Hexagon] Expand sext- and zextloads of vector types, not just extloads

[Krzysztof Parzyszek via llvm-commits]

Author: kparzysz
Date: Thu Sep  8 12:42:14 2016
New Revision: 280973

URL: http://llvm.org/viewvc/llvm-project?rev=280973&view=rev
Log:
[Hexagon] Expand sext- and zextloads of vector types, not just extloads

Recent change exposed this issue, breaking the Hexagon buildbots.

Added:
    llvm/trunk/test/CodeGen/Hexagon/vector-ext-load.ll
Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp

Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp?rev=280973&r1=280972&r2=280973&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp Thu Sep  8 12:42:14 2016
@@ -1968,9 +1968,13 @@ HexagonTargetLowering::HexagonTargetLowe
     for (unsigned VectExpOp : VectExpOps)
       setOperationAction(VectExpOp, VT, Expand);
 
-    // Expand all extended loads and truncating stores:
+    // Expand all extending loads and truncating stores:
     for (MVT TargetVT : MVT::vector_valuetypes()) {
+      if (TargetVT == VT)
+        continue;
       setLoadExtAction(ISD::EXTLOAD, TargetVT, VT, Expand);
+      setLoadExtAction(ISD::ZEXTLOAD, TargetVT, VT, Expand);
+      setLoadExtAction(ISD::SEXTLOAD, TargetVT, VT, Expand);
       setTruncStoreAction(VT, TargetVT, Expand);
     }
 

Added: llvm/trunk/test/CodeGen/Hexagon/vector-ext-load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/vector-ext-load.ll?rev=280973&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/vector-ext-load.ll (added)
+++ llvm/trunk/test/CodeGen/Hexagon/vector-ext-load.ll Thu Sep  8 12:42:14 2016
@@ -0,0 +1,10 @@
+; A copy of 2012-06-08-APIntCrash.ll with arch explicitly set to hexagon.
+
+; RUN: llc -march=hexagon < %s
+
+define void @test1(<8 x i32>* %ptr) {
+  %1 = load <8 x i32>, <8 x i32>* %ptr, align 32
+  %2 = and <8 x i32> %1, <i32 0, i32 0, i32 0, i32 -1, i32 0, i32 0, i32 0, i32 -1>
+  store <8 x i32> %2, <8 x i32>* %ptr, align 16
+  ret void
+}