[PATCH] D23808: [X86][SSE] Add lowering to cvttpd2dq/cvttps2dq for sitofp v2f64/2f32 to 2i32

[Elena Demikhovsky via llvm-commits]

delena added a comment.

I propose to do the following (I wrote some code to be sure that it works)
In ReplaceNodeResults():

  case ISD::FP_TO_SINT: {
      SDValue V = LowerFP_TO_SINT(SDValue(N, 0), DAG)) {
      Results.push_back(V);
      return;
    }

SDValue X86TargetLowering::LowerFP_TO_SINT(SDValue Op,

                                           SelectionDAG &DAG) const {
  MVT VT = Op.getSimpleValueType();
  SDValue Src = Op.getOperand(0);
  MVT SrcVT = Src.getSimpleValueType();
  SDLoc DL(Op);
  
  if (SrcVT == MVT::v2f32 && VT == MVT::v2i32) {
    SDValue Idx = DAG.getIntPtrConstant(0, DL);
    SDValue ExtSrc = DAG.getNode(ISD::CONCAT_VECTORS, DL, MVT::v4f32, Src,
                                 DAG.getUNDEF(MVT::v2f32));
    SDValue FpToInt = DAG.getNode(ISD::FP_TO_SINT, DL, MVT::v4i32, ExtSrc);
    return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v2i32, FpToInt, Idx);
  }
  if (SrcVT == MVT::v2f64 && VT == MVT::v2i32) {
    SDValue FpToInt = DAG.getNode(ISD::FP_TO_SINT, DL, MVT::v4i32, Src);
    return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v2i32, FpToInt,
                       DAG.getIntPtrConstant(0, DL));
  }
    setOperationAction(ISD::FP_TO_SINT,         MVT::v2i32, Custom);
    setOperationAction(ISD::FP_TO_SINT,         MVT::v2f32, Custom);

And you need to add some patterns to the .td files for "fp_to_sint" instead of adding a new node type.


Repository:
  rL LLVM

https://reviews.llvm.org/D23808