[PATCH] D24130: [RegisterScavenger] Remove aliasing registers of operands from the candidate set

[silviu.baranga@arm.com via llvm-commits]

sbaranga added a comment.

In https://reviews.llvm.org/D24130#534839, @qcolombet wrote:

> Have you investigate using the mir representation to produce a test case?


I haven't tried it. I also haven't looked at MIR before but it seems really useful in this case. I'll have a look at it.

There's also a large test case in https://reviews.llvm.org/D24239 for this, but most likely we would want to have something less fragile.


https://reviews.llvm.org/D24130