[PATCH] D21562: [AMDGPU] Wave and register controls

[Tom Stellard via llvm-commits]

tstellarAMD added inline comments.

================
Comment at: lib/Target/AMDGPU/SIRegisterInfo.cpp:871-872
@@ +870,4 @@
+unsigned SIRegisterInfo::getNumReservedSGPRs(const SISubtarget &ST) const {
+  if (ST.getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS)
+    return 6; // VCC, FLAT_SCRATCH, XNACK.
+  return 2; // VCC.
----------------
arsenm wrote:
> This should be narrowed to just if the xnack feature is enabled
We have to use 6 here for all VI, because FLAT_SCRATCH is located 2 sgprs below XNACK, so if you use FLAT_SCRATCH, you have to allocate space for XNACK too, even if the device does not support it.


https://reviews.llvm.org/D21562