[PATCH] D24231: [SimplifyCFG] Add test for sinking inline asm in if/else

[Oliver Stannard via llvm-commits]

olista01 created this revision.
olista01 added reviewers: jmolloy, hans, sanjoy, majnemer.
olista01 added a subscriber: llvm-commits.
olista01 set the repository for this revision to rL LLVM.

This test code previously caused a failure in the module verifier,
because SimplifyCFG created this invalid instruction, which tries to
take the address of inline asm:
  %.sink = select i1 %1, i64 ()* asm "mov $0, #1", "=r", i64 ()* asm %"mov $0, #2", "=r"

This has been fixed recently, presumably by James Molloy's patches that
re-wrote and changed parts of SimplifyCFG, so this patch just adds a
regression test for it.

Repository:
  rL LLVM

https://reviews.llvm.org/D24231

Files:
  test/Transforms/SimplifyCFG/inline-asm-sink.ll

Index: test/Transforms/SimplifyCFG/inline-asm-sink.ll
===================================================================
--- /dev/null
+++ test/Transforms/SimplifyCFG/inline-asm-sink.ll
@@ -0,0 +1,29 @@
+; RUN: opt < %s -simplifycfg -S | FileCheck %s
+
+define i32 @test(i32 %x) {
+; CHECK-LABEL: @test
+entry:
+  %y = alloca i32, align 4
+  %tobool = icmp ne i32 %x, 0
+  br i1 %tobool, label %if.then, label %if.else
+
+if.then:
+; CHECK-LABEL: if.then:
+; CHECK: [[ASM1:%.*]] = call i32 asm "mov $0, #1", "=r"()
+  %tmp1 = call i32 asm "mov $0, #1", "=r"() nounwind readnone
+  store i32 %tmp1, i32* %y, align 4
+  br label %if.end
+
+if.else:
+; CHECK-LABEL: if.else:
+; CHECK: [[ASM2:%.*]] = call i32 asm "mov $0, #2", "=r"()
+  %tmp2 = call i32 asm "mov $0, #2", "=r"() nounwind readnone
+  store i32 %tmp2, i32* %y, align 4
+  br label %if.end
+
+if.end:
+; CHECK-LABEL: if.end:
+; CHECK: {{%.*}} = phi i32 [ [[ASM2]], %if.else ], [ [[ASM1]], %if.then ]
+  %tmp3 = load i32, i32* %y, align 4
+  ret i32 %tmp3
+}


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