[PATCH] D24215: [RFC] AMDGPU: Add MachineInstr::Initiator and ::Terminator flags
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Sat Sep 3 09:54:58 PDT 2016
arsenm added a comment.
I've been moving more in the direction of not considering mask branches as branches at all, and their own separate concept. My patch adds a handful of terminator instruction aliases that are replaced after register allocation with the regular instructions, since it's only used to get correct spill code placement.
https://reviews.llvm.org/D24215
More information about the llvm-commits
mailing list