[PATCH] D23456: [Sparc] Leon Errata Fix Passes

Chris Dewhurst via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 1 13:13:54 PDT 2016


lero_chris added a comment.

Addresses some of the review comments.


================
Comment at: lib/Target/Sparc/LeonFeatures.td:14-85
@@ -14,53 +13,73 @@
 //===----------------------------------------------------------------------===//
-// UMAC and SMAC support for LEON3 and LEON4 processors.
+// CASA Support differs between LEON3-FT GR712RC and LEON3-FT UT699
+// We need to have the option to switch this on and off.
 //===----------------------------------------------------------------------===//
 
-//support to casa instruction; for leon3 subtarget only
-def UMACSMACSupport : SubtargetFeature<
-  "hasumacsmac", 
-  "HasUmacSmac", 
-  "true", 
-  "Enable UMAC and SMAC for LEON3 and LEON4 processors"
->;
-
+// support to casa instruction; for leon3 subtarget only
+def LeonCASA : SubtargetFeature<
+                   "hasleoncasa", "HasLeonCasa", "true",
+                   "Enable CASA instruction for LEON3 and LEON4 processors">;
 
 //===----------------------------------------------------------------------===//
-// CASA Support differs between LEON3-FT GR712RC and LEON3-FT UT699
-// We need to have the option to switch this on and off.
+// UMAC and SMAC support for LEON3 and LEON4 processors.
 //===----------------------------------------------------------------------===//
 
-//support to casa instruction; for leon3 subtarget only
-def LeonCASA : SubtargetFeature<
-  "hasleoncasa", 
-  "HasLeonCasa", 
-  "true", 
-  "Enable CASA instruction for LEON3 and LEON4 processors"
->;
-
-def InsertNOPLoad: SubtargetFeature<
-  "insertnopload",
-  "InsertNOPLoad",
-  "true",
-  "LEON3 erratum fix: Insert a NOP instruction after every single-cycle load instruction when the next instruction is another load/store instruction" 
->;
-
-def FixFSMULD : SubtargetFeature<
-  "fixfsmuld",
-  "FixFSMULD",
-  "true",
-  "LEON erratum fix: Do not use FSMULD" 
->;
-
-def ReplaceFMULS : SubtargetFeature<
-  "replacefmuls",
-  "ReplaceFMULS",
-  "true",
-  "LEON erratum fix: Replace FMULS instruction with FMULD and relevant conversion instructions" 
->;
-
-def FixAllFDIVSQRT : SubtargetFeature<
-  "fixallfdivsqrt",
-  "FixAllFDIVSQRT",
-  "true",
-  "LEON erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD instructions with NOPs and floating-point store" 
->;
+// support to casa instruction; for leon3 subtarget only
+def UMACSMACSupport
+    : SubtargetFeature<"hasumacsmac", "HasUmacSmac", "true",
+                       "Enable UMAC and SMAC for LEON3 and LEON4 processors">;
+
+//===----------------------------------------------------------------------===//
+// LEON Erratum fixes
+//===----------------------------------------------------------------------===//
+
+def ReplaceSDIV
+    : SubtargetFeature<
+          "replacesdiv", "PerformSDIVReplace", "true",
+          "AT697E erratum fix: Do not emit SDIV, emit SDIVCC instead">;
+
+def FixCALL
+    : SubtargetFeature<"fixcall", "FixCallImmediates", "true",
+                       "AT697E erratum fix: Restrict the size of the immediate "
+                       "operand of the CALL instruction to 20 bits">;
+
+def IgnoreZeroFlag
+    : SubtargetFeature<"ignrzeroflag", "IgnoreZeroFlag", "true",
+                       "AT697E erratum fix: Do not rely on the zero bit flag "
+                       "on a divide overflow for SDIVCC and UDIVCC">;
+
+def InsertNOPDoublePrecision
+    : SubtargetFeature<"insrtnopdblprcsn", "InsertNOPDoublePrecision", "true",
+                       "LEON2 erratum fix: Insert a NOP before the double "
+                       "precision floating point instruction">;
+
+def FixFSMULD : SubtargetFeature<"fixfsmuld", "FixFSMULD", "true",
+                                 "LEON3 erratum fix: Do not select FSMULD">;
+
+def ReplaceFMULS
+    : SubtargetFeature<"replacefmuls", "ReplaceFMULS", "true",
+                       "LEON3 erratum fix: Replace FMULS instruction with a "
+                       "routine using conversions/double precision operations "
+                       "to replace FMULS">;
+
+def PreventRoundChange
+    : SubtargetFeature<"prvntroundchange", "PreventRoundChange", "true",
+                       "LEON3 erratum fix: Prevent any rounding mode change "
+                       "request: use only the round-to-nearest rounding mode">;
+
+def FixAllFDIVSQRT
+    : SubtargetFeature<"fixallfdivsqrt", "FixAllFDIVSQRT", "true",
+                       "LEON3 erratum fix: Fix FDIVS/FDIVD/FSQRTS/FSQRTD "
+                       "instructions with NOPs and floating-point store">;
+
+def InsertNOPLoad
+    : SubtargetFeature<"insertnopload", "InsertNOPLoad", "true",
+                       "LEON3 erratum fix: Insert a NOP instruction after "
+                       "every single-cycle load instruction when the next "
+                       "instruction is another load/store instruction">;
+
+def InsertNOPsLoadStore
+    : SubtargetFeature<"insertnopsloadstore", "InsertNOPsLoadStore", "true",
+                       "LEON3 erratum fix: Insert NOPs between "
+                       "single-precision loads and the store, so the number of "
+                       "instructions between is 4">;
----------------
There were some formatting changes to existing code. I've removed these. The remainder are specific to this change.

================
Comment at: lib/Target/Sparc/LeonPasses.cpp:877
@@ -404,2 +876,2 @@
   return Modified;
 }
----------------
Implemented with SETHI and CALLri, per suggestions.

================
Comment at: lib/Target/Sparc/LeonPasses.cpp:877
@@ -404,2 +876,2 @@
   return Modified;
 }
----------------
lero_chris wrote:
> Implemented with SETHI and CALLri, per suggestions.
This is per the design we've been working off. Do you suggest we remove this pass if it's not required?

================
Comment at: lib/Target/Sparc/LeonPasses.cpp:877
@@ -404,2 +876,2 @@
   return Modified;
 }
----------------
lero_chris wrote:
> lero_chris wrote:
> > Implemented with SETHI and CALLri, per suggestions.
> This is per the design we've been working off. Do you suggest we remove this pass if it's not required?
There are other NOP insertion passes in this file for single float instructions, but this is specifically to address problems with double float instructions. Are you sure this should be for singles?

================
Comment at: lib/Target/Sparc/Sparc.td:25
@@ -24,3 +24,3 @@
   : SubtargetFeature<"v9", "IsV9", "true",
                      "Enable SPARC-V9 instructions">;
 def FeatureV8Deprecated
----------------
Removed formatting changes.

================
Comment at: lib/Target/Sparc/SparcISelLowering.cpp:27
@@ -26,3 +26,3 @@
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
----------------
Removed formatting changes.


Repository:
  rL LLVM

https://reviews.llvm.org/D23456





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