[PATCH] D24130: [RegisterScavenger] Remove aliasing registers of operands from the candidate set

[silviu.baranga@arm.com via llvm-commits]

sbaranga created this revision.
sbaranga added reviewers: MatzeB, qcolombet.
sbaranga added a subscriber: llvm-commits.

In addition to not including the register operand of the current
instruction also don't include any aliasing registers. We can't consider
these as candidates because using them will clobber the corresponding
register operand of the current instruction.

This change doesn't include a test case and it would probably be difficult
to produce a stable one since the bug depends on the results of register
allocation.

https://reviews.llvm.org/D24130

Files:
  lib/CodeGen/RegisterScavenging.cpp

Index: lib/CodeGen/RegisterScavenging.cpp
===================================================================
--- lib/CodeGen/RegisterScavenging.cpp
+++ lib/CodeGen/RegisterScavenging.cpp
@@ -419,7 +419,8 @@
   for (const MachineOperand &MO : MI.operands()) {
     if (MO.isReg() && MO.getReg() != 0 && !(MO.isUse() && MO.isUndef()) &&
         !TargetRegisterInfo::isVirtualRegister(MO.getReg()))
-      Candidates.reset(MO.getReg());
+      for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI)
+        Candidates.reset(*AI);
   }
 
   // Try to find a register that's unused if there is one, as then we won't


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