[PATCH] D24057: [LoadStoreVectorizer] Change VectorSet to Vector to match head and tail positions. Resolves PR29148.

[Alina Sbirlea via llvm-commits]

asbirlea created this revision.
asbirlea added reviewers: arsenm, jlebar.
asbirlea added a subscriber: llvm-commits.
Herald added a reviewer: tstellarAMD.
Herald added subscribers: wdng, mzolotukhin.

LSV was using two vector sets (heads and tails) to track pairs of adjiacent position to vectorize.
A recent optimization is trying to obtain the longest chain to vectorize and assumes the positions
in heads(H) and tails(T) match, which is not the case is there are multiple tails for the same head.

e.g.:
i1: store a[0]
i2: store a[1]
i3: store a[1]
Leads to:
H: i1
T: i2 i3
Instead of:
H: i1 i1
T: i2 i3
So the positions for instructions that follow i3 will have different indexes in H/T.
This patch resolves PR29148.

This issue also surfaced the fact that if the chain is too long, and TLI
returns a "not-fast" answer, the whole chain will be abandoned for
vectorization, even though a smaller one would be beneficial.
Added a testcase and FIXME for this.

https://reviews.llvm.org/D24057

Files:
  lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
  test/Transforms/LoadStoreVectorizer/AMDGPU/multiple_tails.ll
  test/Transforms/LoadStoreVectorizer/X86/subchain-interleaved.ll

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