[llvm] r280154 - AMDGPU: Relax SGPR asm constraint register class

[Matt Arsenault via llvm-commits]

Author: arsenm
Date: Tue Aug 30 15:50:08 2016
New Revision: 280154

URL: http://llvm.org/viewvc/llvm-project?rev=280154&view=rev
Log:
AMDGPU: Relax SGPR asm constraint register class

s should be SReg_32 to be as general as possible. This can avoid a copy
from m0.

Modified:
    llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
    llvm/trunk/test/CodeGen/AMDGPU/inline-constraints.ll

Modified: llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp?rev=280154&r1=280153&r2=280154&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp Tue Aug 30 15:50:08 2016
@@ -3751,7 +3751,7 @@ SITargetLowering::getRegForInlineAsmCons
       default:
         return std::make_pair(0U, nullptr);
       case 32:
-        return std::make_pair(0U, &AMDGPU::SGPR_32RegClass);
+        return std::make_pair(0U, &AMDGPU::SReg_32RegClass);
       case 64:
         return std::make_pair(0U, &AMDGPU::SGPR_64RegClass);
       case 128:

Modified: llvm/trunk/test/CodeGen/AMDGPU/inline-constraints.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/inline-constraints.ll?rev=280154&r1=280153&r2=280154&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/inline-constraints.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/inline-constraints.ll Tue Aug 30 15:50:08 2016
@@ -21,3 +21,13 @@ entry:
   %s256 =  tail call <8 x i32> asm sideeffect "s_load_dwordx8 $0, $1", "=s,s"(i32 addrspace(1)* %ptr)
   ret void
 }
+
+; GCN-LABEL: {{^}}inline_sreg_constraint_m0:
+; GCN: s_mov_b32 m0, -1
+; GCN-NOT: s_mov_b32 s{{[0-9]+}}, m0
+; GCN: ; use m0
+define void @inline_sreg_constraint_m0(i32 addrspace(1)* %ptr) {
+  %m0 = tail call i32 asm sideeffect "s_mov_b32 m0, -1", "={M0}"()
+  tail call void asm sideeffect "; use $0", "s"(i32 %m0)
+  ret void
+}