[PATCH] D23795: [mips] Tighten FastISel restrictions

[Vasileios Kalintiris via llvm-commits]

vkalintiris requested changes to this revision.
vkalintiris added a comment.
This revision now requires changes to proceed.

The code changes LGTM but the test case doesn't look like it is testing the right thing.


================
Comment at: test/CodeGen/Mips/Fast-ISel/double-arg.ll:1-2
@@ +1,3 @@
+; RUN: llc -march=mipsel -mcpu=mips32r2 -fast-isel -relocation-model=pic < %s \
+; RUN:     -fast-isel-abort=3 | FileCheck %s
+; RUN: not llc -march=mipsel -mcpu=mips32r6 -fast-isel -relocation-model=pic < %s \
----------------
I'm not sure why we need this RUN test. I would expect a `not llc -mattr=fp64 ...` test in order to make sure that for 64bit FPU registers we don't follow the FastISel path.

================
Comment at: test/CodeGen/Mips/Fast-ISel/double-arg.ll:3-4
@@ +2,4 @@
+; RUN:     -fast-isel-abort=3 | FileCheck %s
+; RUN: not llc -march=mipsel -mcpu=mips32r6 -fast-isel -relocation-model=pic < %s \
+; RUN:     -fast-isel-abort=3 2>&1
+
----------------
This test case is covered by check-disabled-mcpus.ll as we don't support MIPS R6 for FastISel.


Repository:
  rL LLVM

https://reviews.llvm.org/D23795