[llvm] r279804 - Replace subregister uses when processing tied operands

[Matt Arsenault via llvm-commits]

On 08/29/2016 10:54 AM, Krzysztof Parzyszek wrote:
> Hi Matt,
> This is still failing.  Could you take a look?
>
> -Krzysztof
Hi,

Sorry I didn't see this before. If I run your testcase with 
-verify-machineinstrs, I see:
./bin/llc -print-before=twoaddressinstruction 
-print-after=twoaddressinstruction -verify-machineinstrs -march=hexagon 
-o - ~/two-address-subreg.ll
     .text
     .file    "/home/marsenau/two-address-subreg.ll"
# *** IR Dump Before Two-Address instruction pass ***:
# Machine code for function fred: NoPHIs, TracksLivenessFunction Live 
Ins: %D0 in %vreg0

BB#0: derived from LLVM BB %entry
     Live Ins: %D0
     %vreg0<def> = COPY %D0<kill>; DoubleRegs:%vreg0
     %vreg2<def,tied1> = S2_lsr_i_r_acc %vreg0:subreg_loreg<tied0>, 
%vreg0:subreg_loreg, 16; IntRegs:%vreg2 DoubleRegs:%vreg0
     %vreg3<def,tied1> = S2_lsr_i_r_acc %vreg2<kill,tied0>, 
%vreg0:subreg_loreg<kill>, 24; IntRegs:%vreg3,%vreg2 DoubleRegs:%vreg0
     %vreg4<def> = A2_zxtb %vreg3<kill>; IntRegs:%vreg4,%vreg3
     %vreg7<def> = A2_tfrsi 0; IntRegs:%vreg7
     %vreg8<def> = REG_SEQUENCE %vreg4<kill>, subreg_loreg, 
%vreg7<kill>, subreg_hireg; DoubleRegs:%vreg8 IntRegs:%vreg4,%vreg7
     %D0<def> = COPY %vreg8<kill>; DoubleRegs:%vreg8
     PS_jmpret %R31, %PC<imp-def,dead>, %D0<imp-use,kill>

# End machine code for function fred.

# *** IR Dump After Two-Address instruction pass ***:
# Machine code for function fred: NoPHIs, TracksLivenessFunction Live 
Ins: %D0 in %vreg0

BB#0: derived from LLVM BB %entry
     Live Ins: %D0
     %vreg0<def> = COPY %D0<kill>; DoubleRegs:%vreg0
     %vreg2<def> = COPY %vreg0:subreg_loreg; IntRegs:%vreg2 
DoubleRegs:%vreg0
     %vreg2<def,tied1> = S2_lsr_i_r_acc %vreg2<tied0>, 
%vreg2:subreg_loreg, 16; IntRegs:%vreg2
     %vreg3<def> = COPY %vreg2<kill>; IntRegs:%vreg3,%vreg2
     %vreg3<def,tied1> = S2_lsr_i_r_acc %vreg3<tied0>, 
%vreg0:subreg_loreg<kill>, 24; IntRegs:%vreg3 DoubleRegs:%vreg0
     %vreg4<def> = A2_zxtb %vreg3<kill>; IntRegs:%vreg4,%vreg3
     %vreg7<def> = A2_tfrsi 0; IntRegs:%vreg7
     %vreg8:subreg_loreg<def,read-undef> = COPY %vreg4<kill>; 
DoubleRegs:%vreg8 IntRegs:%vreg4
     %vreg8:subreg_hireg<def> = COPY %vreg7<kill>; DoubleRegs:%vreg8 
IntRegs:%vreg7
     %D0<def> = COPY %vreg8<kill>; DoubleRegs:%vreg8
     PS_jmpret %R31, %PC<imp-def,dead>, %D0<imp-use,kill>

# End machine code for function fred.


# After Simple Register Coalescing
********** INTERVALS **********
R0 [0B,16r:0)[160r,176r:1)  0 at 0B-phi 1 at 160r
R1 [0B,16r:0)[160r,176r:1)  0 at 0B-phi 1 at 160r
%vreg0 [16r,80r:0)  0 at 16r L00000002 [16r,80r:0)  0 at 16r L00000001 
[16r,16d:0)  0 at 16r
%vreg3 [32r,48r:2)[48r,80r:0)[80r,96r:1)  0 at 48r 1 at 80r 2 at 32r
%vreg8 [96r,112r:0)[112r,160r:1)  0 at 96r 1 at 112r L00000002 [96r,160r:0)  
0 at 96r L00000001 [112r,160r:0)  0 at 112r
RegMasks:
********** MACHINEINSTRS **********
# Machine code for function fred: NoPHIs, TracksLivenessFunction Live 
Ins: %D0 in %vreg0

0B    BB#0: derived from LLVM BB %entry
         Live Ins: %D0
16B        %vreg0<def> = COPY %D0; DoubleRegs:%vreg0
32B        %vreg3<def> = COPY %vreg0:subreg_loreg; IntRegs:%vreg3 
DoubleRegs:%vreg0
48B        %vreg3<def,tied1> = S2_lsr_i_r_acc %vreg3<tied0>, 
%vreg3:subreg_loreg, 16; IntRegs:%vreg3
80B        %vreg3<def,tied1> = S2_lsr_i_r_acc %vreg3<tied0>, 
%vreg0:subreg_loreg, 24; IntRegs:%vreg3 DoubleRegs:%vreg0
96B        %vreg8:subreg_loreg<def,read-undef> = A2_zxtb %vreg3; 
DoubleRegs:%vreg8 IntRegs:%vreg3
112B        %vreg8:subreg_hireg<def> = A2_tfrsi 0; DoubleRegs:%vreg8
160B        %D0<def> = COPY %vreg8; DoubleRegs:%vreg8
176B        PS_jmpret %R31, %PC<imp-def,dead>, %D0<imp-use>

# End machine code for function fred.

*** Bad machine code: Invalid subregister index for virtual register ***
- function:    fred
- basic block: BB#0 entry (0x4bf0a98) [0B;192B)
- instruction: 48B    %vreg3<def,tied1> = S2_lsr_i_r_acc
- operand 2:   %vreg3:subreg_loreg
Register class IntRegs does not support subreg index 2
LLVM ERROR: Found 1 machine code errors.

I ran into a similar error with AMDGPU I fixed in r278676. For that I 
decided that it doesn't make sense to have an operand with a subregister 
that is tied to a virtual register without one. Before the pass you have:
     %vreg2<def,tied1> = S2_lsr_i_r_acc %vreg2<tied0>, 
%vreg2:subreg_loreg, 16; IntRegs:%vreg2

I don't think it makes sense to have a tied operand where the full 
register is a different register class. Before the pass you have:
     %vreg2<def,tied1> = S2_lsr_i_r_acc %vreg0:subreg_loreg<tied0>, 
%vreg0:subreg_loreg, 16; IntRegs:%vreg2 DoubleRegs:%vreg0

The full registers vreg2 and vreg0 are different register classes, and 
you are constraining them to be tied. I think we should make this 
situtation a verifier error. What do you think?

-Matt