[llvm] r279995 - AMDGPU/SI: Implement a custom MachineSchedStrategy

[Hal Finkel via llvm-commits]

Hi Tom,

This is interesting. I see the following note:

+  // If two instructions increase the pressure of different register sets
+  // by the same amount, the generic scheduler will prefer to schedule the
+  // instruction that increases the set with the least amount of registers,
+  // which in our case would be SGPRs.  This is rarely what we want, so
+  // when we report excess/critical register pressure, we do it either
+  // only for VGPRs or only for SGPRs.

Is this the main difference? Could you explain why this matters? This seems like a lot of boilerplate just to make that change. Is there some other hook we should have?

Thanks again,
Hal

----- Original Message -----
> From: "Tom Stellard via llvm-commits" <llvm-commits at lists.llvm.org>
> To: llvm-commits at lists.llvm.org
> Sent: Monday, August 29, 2016 2:42:52 PM
> Subject: [llvm] r279995 - AMDGPU/SI: Implement a custom MachineSchedStrategy
> 
> Author: tstellar
> Date: Mon Aug 29 14:42:52 2016
> New Revision: 279995
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=279995&view=rev
> Log:
> AMDGPU/SI: Implement a custom MachineSchedStrategy
> 
> Summary:
> GCNSchedStrategy re-uses most of GenericScheduler, it's just uses
> a different method to compute the excess and critical register
> pressure limits.
> 
> It's not enabled by default, to enable it you need to pass
> -misched=gcn
> to llc.
> 
...
> 
> 
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-- 
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory