[PATCH] D23983: [AVX512] Fix zext + bitcast lowering pattern.

[Igor Breger via llvm-commits]

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[AVX512]  Fix  v8i1 /v16i1  zext + bitcast lowering pattern. Explicitly zero upper bits.
Previous implementation generate incorrect code, for example
              t86: v8i1 = X86ISD::CVT2MASK t44
          t88: i8 = bitcast t86
      t59: i32 = zero_extend t88    	
      
            t99: i8 = COPY_TO_REGCLASS t86, TargetConstant:i32<0>
       t59: i32 = SUBREG_TO_REG TargetConstant:i64<0>, t99, TargetConstant:i32<1>

        kmovb	%k0, %r10d
	movb	%r10b, %dil                   -> DI upper bits doesn't zero zeroed

Repository:
  rL LLVM

https://reviews.llvm.org/D23983

Files:
  lib/Target/X86/X86InstrAVX512.td
  test/CodeGen/X86/avx512-mask-op.ll
  test/CodeGen/X86/avx512-mask-zext-bugfix.ll

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