[PATCH] D23930: [AArch64] Fix encoding for lsl #12 in add/sub immediates

[Diana Picus via llvm-commits]

rovka created this revision.
rovka added reviewers: t.p.northover, compnerd.
rovka added subscribers: llvm-commits, rengolin, psmith.
Herald added a subscriber: aemerson.

Whenever an add/sub immediate needs a fixup, we set that immediate field to zero,
which is correct, but we also set the shift bits to zero, which is not true for
instructions that use lsl #12. This patch makes sure that if lsl #12 was used,
it will appear in the encoding of the instruction.


https://reviews.llvm.org/D23930

Files:
  lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
  test/MC/AArch64/darwin-reloc-addsubimm.s
  test/MC/AArch64/elf-reloc-addsubimm.s
  test/MC/AArch64/label-arithmetic-darwin.s
  test/MC/AArch64/label-arithmetic-elf.s
  test/MC/AArch64/tls-relocs.s

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